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Commit 4edc6a82 authored by Sandeep Panda's avatar Sandeep Panda
Browse files

msm: mdss: disable dynamic clock gating for 8909 



On 8909 platform dynamic clock gating needs to be
disabled in order to transfer dsi commands successfully.

Change-Id: I0959c2517c5c7bc6b8d251d73fb7d2d4894e1896
Signed-off-by: default avatarSandeep Panda <spanda@codeaurora.org>
parent 19fc3d95

drivers/video/msm/mdss/mdp3.c

+47 −0
Original line number Diff line number Diff line
@@ -920,6 +920,35 @@ static int mdp3_hw_init(void) 
	return 0;

}



int mdp3_dynamic_clock_gating_ctrl(int enable)

{

	int rc = 0;

	/*Disable dynamic auto clock gating*/

	rc = mdp3_clk_update(MDP3_CLK_AHB, 1);

	rc |= mdp3_clk_update(MDP3_CLK_AXI, 1);

	rc |= mdp3_clk_update(MDP3_CLK_MDP_CORE, 1);

	if (rc) {

		pr_err("fail to turn on MDP core clks\n");

		return rc;

	}



	if (enable) {

		MDP3_REG_WRITE(MDP3_REG_CGC_EN, 0x7FFFF);

		VBIF_REG_WRITE(MDP3_VBIF_REG_FORCE_EN, 0x0);

	} else {

		MDP3_REG_WRITE(MDP3_REG_CGC_EN, 0x3FFFF);

		VBIF_REG_WRITE(MDP3_VBIF_REG_FORCE_EN, 0x3);

	}



	rc = mdp3_clk_update(MDP3_CLK_AHB, 0);

	rc |= mdp3_clk_update(MDP3_CLK_AXI, 0);

	rc |= mdp3_clk_update(MDP3_CLK_MDP_CORE, 0);

	if (rc)

		pr_warn("fail to turn off MDP core clks\n");



	return rc;

}



static int mdp3_res_init(void)

{

	int rc = 0;
@@ -1151,6 +1180,24 @@ static int mdp3_parse_dt(struct platform_device *pdev) 
		(int) res->start,

		(int) mdp3_res->mdp_base);



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vbif_phys");

	if (!res) {

		pr_err("unable to get VBIF base address\n");

		return -EINVAL;

	}



	mdp3_res->vbif_reg_size = resource_size(res);

	mdp3_res->vbif_base = devm_ioremap(&pdev->dev, res->start,

					mdp3_res->vbif_reg_size);

	if (unlikely(!mdp3_res->vbif_base)) {

		pr_err("unable to map VBIF base\n");

		return -ENOMEM;

	}



	pr_debug("VBIF HW Base phy_Address=0x%x virt=0x%x\n",

		(int) res->start,

		(int) mdp3_res->vbif_base);



	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);

	if (!res) {

		pr_err("unable to get MDSS irq\n");

drivers/video/msm/mdss/mdp3.h

+6 −0
Original line number Diff line number Diff line
@@ -118,6 +118,9 @@ struct mdp3_hw_resource { 
	char __iomem *mdp_base;

	size_t mdp_reg_size;



	char __iomem *vbif_base;

	size_t vbif_reg_size;



	struct mdp3_bus_handle_map *bus_handle;



	struct ion_client *ion_client;
@@ -194,8 +197,11 @@ int mdp3_misr_get(struct mdp_misr *misr_resp); 
void mdp3_enable_regulator(int enable);

void mdp3_check_dsi_ctrl_status(struct work_struct *work,

				uint32_t interval);

int mdp3_dynamic_clock_gating_ctrl(int enable);



#define MDP3_REG_WRITE(addr, val) writel_relaxed(val, mdp3_res->mdp_base + addr)

#define MDP3_REG_READ(addr) readl_relaxed(mdp3_res->mdp_base + addr)

#define VBIF_REG_WRITE(off, val) writel_relaxed(val, mdp3_res->vbif_base + off)

#define VBIF_REG_READ(off) readl_relaxed(mdp3_res->vbif_base + off)



#endif /* MDP3_H */

drivers/video/msm/mdss/mdp3_ctrl.c

+6 −0
Original line number Diff line number Diff line
@@ -600,6 +600,12 @@ static int mdp3_ctrl_on(struct msm_fb_data_type *mfd) 
		goto on_error;

	}



	rc = mdp3_dynamic_clock_gating_ctrl(0);

	if (rc) {

		pr_err("fail to disable dynamic clock gating\n");

		goto on_error;

	}



	panel = mdp3_session->panel;

	if (panel->event_handler) {

		rc = panel->event_handler(panel, MDSS_EVENT_UNBLANK, NULL);

drivers/video/msm/mdss/mdp3_hwio.h

+1 −0
Original line number Diff line number Diff line
@@ -63,6 +63,7 @@ 


/*clock control*/

#define MDP3_REG_CGC_EN					0x0100

#define MDP3_VBIF_REG_FORCE_EN				0x0004



/*danger safe*/

#define MDP3_PANIC_ROBUST_CTRL				0x900A0