Loading drivers/gpu/msm/adreno.h +6 −0 Original line number Diff line number Diff line Loading @@ -289,6 +289,11 @@ struct adreno_device { * after power collapse * @ADRENO_DEVICE_CORESIGHT - Set if the coresight (trace bus) registers should * be restored after power collapse * @ADRENO_DEVICE_HANG_INTR - Set if the hang interrupt should be enabled for * this target * @ADRENO_DEVICE_STARTED - Set if the device start sequence is in progress * @ADRENO_DEVICE_FAULT - Set if the device is currently in fault (and shouldn't * send any more commands to the ringbuffer) */ enum adreno_device_flags { ADRENO_DEVICE_PWRON = 0, Loading @@ -297,6 +302,7 @@ enum adreno_device_flags { ADRENO_DEVICE_CORESIGHT = 3, ADRENO_DEVICE_HANG_INTR = 4, ADRENO_DEVICE_STARTED = 5, ADRENO_DEVICE_FAULT = 6, }; #define PERFCOUNTER_FLAG_NONE 0x0 Loading drivers/gpu/msm/adreno_dispatch.c +10 −0 Original line number Diff line number Diff line Loading @@ -1199,6 +1199,13 @@ static int dispatcher_do_fault(struct kgsl_device *device) mutex_lock(&device->mutex); /* * Set the fault bit to make sure that no other threads try to use the * GPU until we are done here */ set_bit(ADRENO_DEVICE_FAULT, &adreno_dev->priv); /* hang opcode */ kgsl_cffdump_hang(device); Loading Loading @@ -1511,6 +1518,9 @@ replay: } } /* Clear the fault bit */ clear_bit(ADRENO_DEVICE_FAULT, &adreno_dev->priv); kfree(replay); /* restore halt indicator */ atomic_add(halt, &adreno_dev->halt); Loading drivers/gpu/msm/adreno_iommu.c +4 −0 Original line number Diff line number Diff line Loading @@ -678,6 +678,10 @@ static unsigned int adreno_iommu_set_pt_generate_cmds( int num_iommu_units; unsigned int *cmds_orig = cmds; /* If we are in a fault the MMU will be reset soon */ if (test_bit(ADRENO_DEVICE_FAULT, &adreno_dev->priv)) return 0; num_iommu_units = kgsl_mmu_get_num_iommu_units(&device->mmu); pt_val = kgsl_mmu_get_pt_base_addr(&device->mmu, pt); Loading Loading
drivers/gpu/msm/adreno.h +6 −0 Original line number Diff line number Diff line Loading @@ -289,6 +289,11 @@ struct adreno_device { * after power collapse * @ADRENO_DEVICE_CORESIGHT - Set if the coresight (trace bus) registers should * be restored after power collapse * @ADRENO_DEVICE_HANG_INTR - Set if the hang interrupt should be enabled for * this target * @ADRENO_DEVICE_STARTED - Set if the device start sequence is in progress * @ADRENO_DEVICE_FAULT - Set if the device is currently in fault (and shouldn't * send any more commands to the ringbuffer) */ enum adreno_device_flags { ADRENO_DEVICE_PWRON = 0, Loading @@ -297,6 +302,7 @@ enum adreno_device_flags { ADRENO_DEVICE_CORESIGHT = 3, ADRENO_DEVICE_HANG_INTR = 4, ADRENO_DEVICE_STARTED = 5, ADRENO_DEVICE_FAULT = 6, }; #define PERFCOUNTER_FLAG_NONE 0x0 Loading
drivers/gpu/msm/adreno_dispatch.c +10 −0 Original line number Diff line number Diff line Loading @@ -1199,6 +1199,13 @@ static int dispatcher_do_fault(struct kgsl_device *device) mutex_lock(&device->mutex); /* * Set the fault bit to make sure that no other threads try to use the * GPU until we are done here */ set_bit(ADRENO_DEVICE_FAULT, &adreno_dev->priv); /* hang opcode */ kgsl_cffdump_hang(device); Loading Loading @@ -1511,6 +1518,9 @@ replay: } } /* Clear the fault bit */ clear_bit(ADRENO_DEVICE_FAULT, &adreno_dev->priv); kfree(replay); /* restore halt indicator */ atomic_add(halt, &adreno_dev->halt); Loading
drivers/gpu/msm/adreno_iommu.c +4 −0 Original line number Diff line number Diff line Loading @@ -678,6 +678,10 @@ static unsigned int adreno_iommu_set_pt_generate_cmds( int num_iommu_units; unsigned int *cmds_orig = cmds; /* If we are in a fault the MMU will be reset soon */ if (test_bit(ADRENO_DEVICE_FAULT, &adreno_dev->priv)) return 0; num_iommu_units = kgsl_mmu_get_num_iommu_units(&device->mmu); pt_val = kgsl_mmu_get_pt_base_addr(&device->mmu, pt); Loading