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Commit 4dffc404 authored by Eugeni Dodonov's avatar Eugeni Dodonov Committed by Daniel Vetter
Browse files

drm/i915: add WRPLL clocks 



The WR PLL can drive the DDI ports at fixed frequencies for HDMI, DVI, DP
and FDI.

Signed-off-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 90e8d31c

drivers/gpu/drm/i915/i915_reg.h

+8 −0
Original line number Diff line number Diff line
@@ -4157,6 +4157,14 @@ 
#define  SPLL_PLL_FREQ_810MHz	(0<<26)

#define  SPLL_PLL_FREQ_1350MHz	(1<<26)



/* WRPLL */

#define WRPLL_CTL1				0x46040

#define WRPLL_CTL2				0x46060

#define  WRPLL_PLL_ENABLE				(1<<31)

#define  WRPLL_PLL_SELECT_SSC			(0x01<<28)

#define  WRPLL_PLL_SELECT_NON_SCC		(0x02<<28)

#define  WRPLL_PLL_SELECT_LCPLL_2700	(0x03<<28)



/* Port clock selection */

#define PORT_CLK_SEL_A			0x46100

#define PORT_CLK_SEL_B			0x46104