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Commit 4dc808ab authored by Padmanabhan Komanduru's avatar Padmanabhan Komanduru
Browse files

ARM: dts: Update the MDSS DT configuration for 8916 



Add the missing DT entries for 8916 MDSS and make sure that
the configuration is inline with other MDSS revisions.

Change-Id: Ibf8a198fa77dc86e9838b0526216dff70ed04b9e
Signed-off-by: default avatarPadmanabhan Komanduru <pkomandu@codeaurora.org>
parent 219364c5

arch/arm/boot/dts/qcom/msm8916-mdss.dtsi

+25 −4
Original line number Diff line number Diff line
@@ -31,9 +31,11 @@ 
		/* Fudge factors */

		qcom,mdss-ab-factor = <2 1>;		/* 2 times    */

		qcom,mdss-ib-factor = <3 2>;		/* 1.5 times  */

		qcom,mdss-high-ib-factor = <2 1>;	/* 2 times    */

		qcom,mdss-clk-factor = <5 4>;		/* 1.25 times */

		qcom,max-bandwidth-low-kbps = <1660000>;

		qcom,max-bandwidth-high-kbps = <1660000>;



		qcom,mdss-mdp-reg-offset = <0x00001000>;

		qcom,max-clk-rate = <216000000>;

		qcom,mdss-pipe-vig-off = <0x00005000>;

		qcom,mdss-pipe-rgb-off = <0x00015000 0x00017000>;
@@ -41,6 +43,15 @@ 
		qcom,mdss-pipe-vig-fetch-id = <1>;

		qcom,mdss-pipe-rgb-fetch-id = <7 8>;

		qcom,mdss-pipe-dma-fetch-id = <4>;



		qcom,mdss-pipe-vig-xin-id = <0>;

		qcom,mdss-pipe-rgb-xin-id = <1 5>;

		qcom,mdss-pipe-dma-xin-id = <2>;

		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x12ac 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x12ac 4 8>,

						      <0x12b4 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x12ac 8 12>;



		qcom,mdss-smp-data = <8 8192>;



		qcom,mdss-ctl-off = <0x00002000 0x00002200 0x00002400>;
@@ -51,6 +62,8 @@ 
		qcom,mdss-wb-off = <0x00065000 0x00065800 0x00066000>;

		qcom,mdss-intf-off = <0x00000000 0x0006b800>;

		qcom,mdss-rot-block-size = <64>;

		qcom,mdss-wfd-mode = "dedicated";

		qcom,mdss-has-non-scalar-rgb;

		vdd-cx-supply = <&pm8916_s1_corner>;

		clocks = <&clock_gcc clk_gcc_mdss_ahb_clk>,

			 <&clock_gcc clk_gcc_mdss_axi_clk>,
@@ -59,13 +72,21 @@ 
			 <&clock_gcc clk_gcc_mdss_vsync_clk>;

		clock-names = "iface_clk", "bus_clk", "core_clk_src",

				"core_clk", "vsync_clk";

		qcom,mdss-has-wfd-blk;

		qcom,vbif-settings = <0x004 0x00000001>,

				     <0x0d8 0x00000707>,

				     <0x124 0x00000003>;

		qcom,mdp-settings = <0x11e0 0x000000a5>,

				    <0x11e4 0x00000055>;



		/* buffer parameters to calculate prefill bandwidth */

		qcom,mdss-prefill-outstanding-buffer-bytes = <1024>;

		qcom,mdss-prefill-y-buffer-bytes = <0>;

		qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;

		qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;

		qcom,mdss-prefill-post-scaler-buffer-pixels = <0>;

		qcom,mdss-prefill-pingpong-buffer-pixels = <4096>;

		qcom,mdss-prefill-fbc-lines = <0>;



		mdss_fb0: qcom,mdss_fb_primary {

			cell-index = <0>;

			compatible = "qcom,mdss-fb";
@@ -86,7 +107,7 @@ 
		qcom,mdss-mdp = <&mdss_mdp>;

		vdd-supply = <&pm8916_l17>;

		vddio-supply = <&pm8916_l6>;

		vdda-supply = <&pm8916_l3>;

		vdda-supply = <&pm8916_l2>;

		clocks = <&clock_gcc clk_gcc_mdss_ahb_clk>,

			 <&clock_gcc clk_gcc_mdss_axi_clk>,

			 <&clock_gcc clk_gcc_mdss_mdp_clk>;
@@ -136,7 +157,7 @@ 


	qcom,mdss_wb_panel {

		compatible = "qcom,mdss_wb";

		qcom,mdss_pan_res = <640 480>;

		qcom,mdss_pan_res = <1280 720>;

		qcom,mdss_pan_bpp = <24>;

		qcom,mdss-fb-map = <&mdss_fb1>;

	};

arch/arm/boot/dts/qcom/msm8916.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -108,6 +108,7 @@ 
#include "msm-gdsc-8916.dtsi"

#include "msm8916-iommu.dtsi"

#include "msm8916-gpu.dtsi"

#include "msm8916-mdss.dtsi"



&soc {

	#address-cells = <1>;