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Commit 4d7cb45e authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Paul Walmsley
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ARM: omap: clk: add clk_prepare and clk_unprepare 



As part of Common Clk Framework (CCF) the clk_enable() operation
was split into a clk_prepare() which could sleep, and a clk_enable()
which should never sleep. Similarly the clk_disable() was
split into clk_disable() and clk_unprepare(). This was
needed to handle complex cases where in a clk gate/ungate
would require a slow and a fast part to be implemented.
None of the clocks below seem to be in the 'complex' clocks
category and are just simple clocks which are enabled/disabled
through simple register writes.
Most of the instances also seem to be called in non-atomic
context which means its safe to move all of those from
using a clk_enable() to clk_prepare_enable() and clk_disable() to
clk_disable_unprepare().

For some others, mainly the ones handled through the hwmod framework
there is a possibility that they get called in either an atomic
or a non-atomic context.

The way these get handled below work only as long as clk_prepare
is implemented as a no-op (which is the case today) since this gets
called very early at boot while most subsystems are unavailable.
Hence these are marked with a *HACK* comment, which says we need
to re-visit these once we start doing something meaningful with
clk_prepare/clk_unprepare like doing voltage scaling or something
that involves i2c.

This is in preparation of OMAP moving to CCF.

Based on initial changes from Mike Turquette.

Signed-off-by: default avatarRajendra Nayak <rnayak@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent a04bcc23

arch/arm/mach-omap2/board-apollon.c

+2 −2
Original line number Diff line number Diff line
@@ -202,7 +202,7 @@ static inline void __init apollon_init_smc91x(void) 
		return;

	}



	clk_enable(gpmc_fck);

	clk_prepare_enable(gpmc_fck);

	rate = clk_get_rate(gpmc_fck);



	eth_cs = APOLLON_ETH_CS;
@@ -246,7 +246,7 @@ static inline void __init apollon_init_smc91x(void) 
		gpmc_cs_free(APOLLON_ETH_CS);

	}

out:

	clk_disable(gpmc_fck);

	clk_disable_unprepare(gpmc_fck);

	clk_put(gpmc_fck);

}

arch/arm/mach-omap2/board-h4.c

+3 −3
Original line number Diff line number Diff line
@@ -265,9 +265,9 @@ static inline void __init h4_init_debug(void) 
		return;

	}



	clk_enable(gpmc_fck);

	clk_prepare_enable(gpmc_fck);

	rate = clk_get_rate(gpmc_fck);

	clk_disable(gpmc_fck);

	clk_disable_unprepare(gpmc_fck);

	clk_put(gpmc_fck);



	if (is_gpmc_muxed())
@@ -311,7 +311,7 @@ static inline void __init h4_init_debug(void) 
		gpmc_cs_free(eth_cs);



out:

	clk_disable(gpmc_fck);

	clk_disable_unprepare(gpmc_fck);

	clk_put(gpmc_fck);

}

arch/arm/mach-omap2/board-omap4panda.c

+1 −1
Original line number Diff line number Diff line
@@ -171,7 +171,7 @@ static void __init omap4_ehci_init(void) 
		return;

	}

	clk_set_rate(phy_ref_clk, 19200000);

	clk_enable(phy_ref_clk);

	clk_prepare_enable(phy_ref_clk);



	/* disable the power to the usb hub prior to init and reset phy+hub */

	ret = gpio_request_array(panda_ehci_gpios,

arch/arm/mach-omap2/clock3xxx.c

+4 −4
Original line number Diff line number Diff line
@@ -64,15 +64,15 @@ void __init omap3_clk_lock_dpll5(void) 


	dpll5_clk = clk_get(NULL, "dpll5_ck");

	clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);

	clk_enable(dpll5_clk);

	clk_prepare_enable(dpll5_clk);



	/* Program dpll5_m2_clk divider for no division */

	dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck");

	clk_enable(dpll5_m2_clk);

	clk_prepare_enable(dpll5_m2_clk);

	clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);



	clk_disable(dpll5_m2_clk);

	clk_disable(dpll5_clk);

	clk_disable_unprepare(dpll5_m2_clk);

	clk_disable_unprepare(dpll5_clk);

	return;

}

arch/arm/mach-omap2/display.c

+2 −2
Original line number Diff line number Diff line
@@ -488,7 +488,7 @@ int omap_dss_reset(struct omap_hwmod *oh) 


	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)

		if (oc->_clk)

			clk_enable(oc->_clk);

			clk_prepare_enable(oc->_clk);



	dispc_disable_outputs();
@@ -515,7 +515,7 @@ int omap_dss_reset(struct omap_hwmod *oh) 


	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)

		if (oc->_clk)

			clk_disable(oc->_clk);

			clk_disable_unprepare(oc->_clk);



	r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;