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Commit 4cf6bbc4 authored by Junjie Wu's avatar Junjie Wu
Browse files

clock-alpha-pll: Add offset support for alpha_pll_clk 



Each clock driver ioremaps its entire address space. Each clock inside the
controller access its registers with base + offset. Add offset support for
alpha_pll_clk so that it can be instantiated same way as all other clocks.

Change-Id: I14740b77b9f45659bbd0ba2dd421728a8426c6f9
Signed-off-by: default avatarJunjie Wu <junjiew@codeaurora.org>
parent c7fd1997

drivers/clk/qcom/clock-alpha-pll.c

+7 −7
Original line number Diff line number Diff line
@@ -23,13 +23,13 @@ 


#define WAIT_MAX_LOOPS 100



#define MODE_REG(pll) (*pll->base + 0x0)

#define LOCK_REG(pll) (*pll->base + 0x0)

#define UPDATE_REG(pll) (*pll->base + 0x0)

#define L_REG(pll) (*pll->base + 0x4)

#define A_REG(pll) (*pll->base + 0x8)

#define VCO_REG(pll) (*pll->base + 0x10)

#define ALPHA_EN_REG(pll) (*pll->base + 0x10)

#define MODE_REG(pll) (*pll->base + pll->offset + 0x0)

#define LOCK_REG(pll) (*pll->base + pll->offset + 0x0)

#define UPDATE_REG(pll) (*pll->base + pll->offset + 0x0)

#define L_REG(pll) (*pll->base + pll->offset + 0x4)

#define A_REG(pll) (*pll->base + pll->offset + 0x8)

#define VCO_REG(pll) (*pll->base + pll->offset + 0x10)

#define ALPHA_EN_REG(pll) (*pll->base + pll->offset + 0x10)



#define PLL_BYPASSNL 0x2

#define PLL_RESET_N  0x4

include/soc/qcom/clock-alpha-pll.h

+2 −1
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -41,6 +41,7 @@ struct alpha_pll_vco_tbl { 
struct alpha_pll_clk {

	struct alpha_pll_masks *masks;

	void *const __iomem *base;

	const u32 offset;



	struct alpha_pll_vco_tbl *vco_tbl;

	u32 num_vco;