Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4a8d57a5 authored by Uwe Kleine-König's avatar Uwe Kleine-König
Browse files

ARM: zImage: some comments for __armv3_mpu_cache_on 



__armv3_mpu_cache_on seems broken.  As there is noone around who knows
about these machines just keep the code as is but point out the strange
things.

Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
parent 88237c25

arch/arm/boot/compressed/head.S

+6 −0
Original line number Diff line number Diff line
@@ -396,12 +396,18 @@ __armv3_mpu_cache_on: 


		mov	r0, #0

		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3

		/*

		 * ?? ARMv3 MMU does not allow reading the control register,

		 * does this really work on ARMv3 MPU?

		 */

		mrc	p15, 0, r0, c1, c0, 0	@ read control reg

						@ .... .... .... WC.M

		orr	r0, r0, #0x000d		@ .... .... .... 11.1

		/* ?? this overwrites the value constructed above? */

		mov	r0, #0

		mcr	p15, 0, r0, c1, c0, 0	@ write control reg



		/* ?? invalidate for the second time? */

		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3

		mov	pc, lr