Loading arch/arm/mach-msm/Kconfig +0 −30 Original line number Diff line number Diff line Loading @@ -615,20 +615,6 @@ config MSM_SMD used to communicate with various services on the baseband processor. choice prompt "MSM Shared memory interface version" depends on MSM_SMD default MSM_SMD_PKG4 config MSM_SMD_PKG3 bool prompt "Package 3" config MSM_SMD_PKG4 bool prompt "Package 4" endchoice config MSM_PCIE bool "MSM PCIe Controller driver" depends on PCI && PCI_MSI Loading @@ -655,22 +641,6 @@ config MSM_BAM_DMUX provides a means to support more logical channels via muxing than BAM could without muxing. config MSM_N_WAY_SMD depends on MSM_SMD default y bool "MSM N-WAY SMD support" help Supports APPS-QDSP SMD communication along with normal APPS-MODEM SMD communication. config MSM_N_WAY_SMSM depends on MSM_SMD default y bool "MSM N-WAY SMSM support" help Supports APPS-QDSP SMSM communication along with normal APPS-MODEM SMSM communication. config MSM_SMP2P bool "SMSM Point-to-Point (SMP2P)" depends on MSM_SMD Loading arch/arm/mach-msm/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -31,7 +31,7 @@ target += smd_rpc_sym.c $(obj)/smd_rpc_sym.c: $(src)/smd_rpc_sym $(src)/mkrpcsym.pl $(call if_changed,mkrpcsym) obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o smd_private.o smd_init_dt.o smd_init_plat.o smsm_debug.o obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o smd_private.o smd_init_dt.o smsm_debug.o obj-$(CONFIG_MSM_SMP2P) += smp2p.o smp2p_debug.o smp2p_gpio.o obj-$(CONFIG_MSM_SMP2P_TEST) += smp2p_loopback.o smp2p_test.o smp2p_gpio_test.o smp2p_spinlock_test.o obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o Loading arch/arm/mach-msm/include/mach/msm_smd.h +0 −74 Original line number Diff line number Diff line Loading @@ -19,7 +19,6 @@ #define __ASM_ARCH_MSM_SMD_H #include <linux/io.h> #include <linux/notifier.h> #include <soc/msm/smem.h> Loading Loading @@ -75,73 +74,9 @@ enum { SMD_WCNSS_RPM, SMD_TZ_RPM, SMD_NUM_TYPE, SMD_LOOPBACK_TYPE = 100, }; /* * SMD IRQ Configuration * * Used to initialize IRQ configurations from platform data * * @irq_name: irq_name to query platform data * @irq_id: initialized to -1 in platform data, stores actual irq id on * successful registration * @out_base: if not null then settings used for outgoing interrupt * initialied from platform data */ struct smd_irq_config { /* incoming interrupt config */ const char *irq_name; unsigned long flags; int irq_id; const char *device_name; const void *dev_id; /* outgoing interrupt config */ uint32_t out_bit_pos; void __iomem *out_base; uint32_t out_offset; }; /* * SMD subsystem configurations * * SMD subsystems configurations for platform data. This contains the * M2A and A2M interrupt configurations for both SMD and SMSM per * subsystem. * * @subsys_name: name of subsystem passed to PIL * @irq_config_id: unique id for each subsystem * @edge: maps to actual remote subsystem edge * */ struct smd_subsystem_config { unsigned irq_config_id; const char *subsys_name; int edge; struct smd_irq_config smd_int; struct smd_irq_config smsm_int; }; /* * Subsystem Restart Configuration * * @disable_smsm_reset_handshake */ struct smd_subsystem_restart_config { int disable_smsm_reset_handshake; }; struct smd_platform { uint32_t num_ss_configs; struct smd_subsystem_config *smd_ss_configs; struct smd_subsystem_restart_config *smd_ssr_config; }; #ifdef CONFIG_MSM_SMD int smd_close(smd_channel_t *ch); Loading Loading @@ -172,15 +107,6 @@ int smd_read_avail(smd_channel_t *ch); */ int smd_cur_packet_size(smd_channel_t *ch); #if 0 /* these are interruptable waits which will block you until the specified ** number of bytes are readable or writable. */ int smd_wait_until_readable(smd_channel_t *ch, int bytes); int smd_wait_until_writable(smd_channel_t *ch, int bytes); #endif /* these are used to get and set the IF sigs of a channel. * DTR and RTS can be set; DSR, CTS, CD and RI can be read. */ Loading arch/arm/mach-msm/include/mach/msm_smsm.h +0 −60 Original line number Diff line number Diff line Loading @@ -13,11 +13,8 @@ #ifndef _ARCH_ARM_MACH_MSM_SMSM_H_ #define _ARCH_ARM_MACH_MSM_SMSM_H_ #include <linux/notifier.h> #include <soc/msm/smem.h> #if defined(CONFIG_MSM_N_WAY_SMSM) enum { SMSM_APPS_STATE, SMSM_MODEM_STATE, Loading @@ -31,13 +28,6 @@ enum { SMSM_TIME_MASTER_DEM, }; extern uint32_t SMSM_NUM_ENTRIES; #else enum { SMSM_APPS_STATE = 1, SMSM_MODEM_STATE = 3, SMSM_NUM_ENTRIES, }; #endif /* * Ordered by when processors adopted the SMSM protocol. May not be 1-to-1 Loading @@ -53,63 +43,19 @@ enum { extern uint32_t SMSM_NUM_HOSTS; #define SMSM_INIT 0x00000001 #define SMSM_OSENTERED 0x00000002 #define SMSM_SMDWAIT 0x00000004 #define SMSM_SMDINIT 0x00000008 #define SMSM_RPCWAIT 0x00000010 #define SMSM_RPCINIT 0x00000020 #define SMSM_RESET 0x00000040 #define SMSM_RSA 0x00000080 #define SMSM_RUN 0x00000100 #define SMSM_PWRC 0x00000200 #define SMSM_TIMEWAIT 0x00000400 #define SMSM_TIMEINIT 0x00000800 #define SMSM_PROC_AWAKE 0x00001000 #define SMSM_WFPI 0x00002000 #define SMSM_SLEEP 0x00004000 #define SMSM_SLEEPEXIT 0x00008000 #define SMSM_OEMSBL_RELEASE 0x00010000 #define SMSM_APPS_REBOOT 0x00020000 #define SMSM_SYSTEM_POWER_DOWN 0x00040000 #define SMSM_SYSTEM_REBOOT 0x00080000 #define SMSM_SYSTEM_DOWNLOAD 0x00100000 #define SMSM_PWRC_SUSPEND 0x00200000 #define SMSM_APPS_SHUTDOWN 0x00400000 #define SMSM_SMD_LOOPBACK 0x00800000 #define SMSM_RUN_QUIET 0x01000000 #define SMSM_MODEM_WAIT 0x02000000 #define SMSM_MODEM_BREAK 0x04000000 #define SMSM_MODEM_CONTINUE 0x08000000 #define SMSM_SYSTEM_REBOOT_USR 0x20000000 #define SMSM_SYSTEM_PWRDWN_USR 0x40000000 #define SMSM_UNKNOWN 0x80000000 #define SMSM_WKUP_REASON_RPC 0x00000001 #define SMSM_WKUP_REASON_INT 0x00000002 #define SMSM_WKUP_REASON_GPIO 0x00000004 #define SMSM_WKUP_REASON_TIMER 0x00000008 #define SMSM_WKUP_REASON_ALARM 0x00000010 #define SMSM_WKUP_REASON_RESET 0x00000020 #define SMSM_USB_PLUG_UNPLUG 0x00002000 #define SMSM_A2_RESET_BAM 0x00004000 #define SMSM_VENDOR 0x00020000 #define SMSM_A2_POWER_CONTROL 0x00000002 #define SMSM_A2_POWER_CONTROL_ACK 0x00000800 #define SMSM_WLAN_TX_RINGS_EMPTY 0x00000200 #define SMSM_WLAN_TX_ENABLE 0x00000400 #define SMSM_SUBSYS2AP_STATUS 0x00008000 enum { SMEM_APPS_Q6_SMSM = 3, SMEM_Q6_APPS_SMSM = 5, SMSM_NUM_INTR_MUX = 8, }; #ifdef CONFIG_MSM_SMD int smsm_change_state(uint32_t smsm_entry, uint32_t clear_mask, uint32_t set_mask); Loading Loading @@ -137,12 +83,6 @@ int smsm_state_cb_register(uint32_t smsm_entry, uint32_t mask, void *data); int smsm_state_cb_deregister(uint32_t smsm_entry, uint32_t mask, void (*notify)(void *, uint32_t, uint32_t), void *data); void smsm_reset_modem(unsigned mode); void smsm_reset_modem_cont(void); void smd_sleep_exit(void); int smsm_check_for_modem_crash(void); #else static inline int smsm_change_state(uint32_t smsm_entry, Loading arch/arm/mach-msm/include/mach/smem_log.h +0 −45 Original line number Diff line number Diff line Loading @@ -54,7 +54,6 @@ #define SMEM_LOG_IPC_ROUTER_EVENT_BASE 0x000D0000 #define SMEM_LOG_QMI_CCI_EVENT_BASE 0x000E0000 #define SMEM_LOG_QMI_CSI_EVENT_BASE 0x000F0000 #if defined(CONFIG_MSM_N_WAY_SMSM) #define DEM_SMSM_ISR (SMEM_LOG_DEM_EVENT_BASE + 0x1) #define DEM_STATE_CHANGE (SMEM_LOG_DEM_EVENT_BASE + 0x2) #define DEM_STATE_MACHINE_ENTER (SMEM_LOG_DEM_EVENT_BASE + 0x3) Loading Loading @@ -92,50 +91,6 @@ #define DEM_TIME_SYNC_POLL (SMEM_LOG_DEM_EVENT_BASE + 0x22) #define DEM_TIME_SYNC_INIT (SMEM_LOG_DEM_EVENT_BASE + 0x23) #define DEM_INIT (SMEM_LOG_DEM_EVENT_BASE + 0x25) #else #define DEM_NO_SLEEP (SMEM_LOG_DEM_EVENT_BASE + 1) #define DEM_INSUF_TIME (SMEM_LOG_DEM_EVENT_BASE + 2) #define DEMAPPS_ENTER_SLEEP (SMEM_LOG_DEM_EVENT_BASE + 3) #define DEMAPPS_DETECT_WAKEUP (SMEM_LOG_DEM_EVENT_BASE + 4) #define DEMAPPS_END_APPS_TCXO (SMEM_LOG_DEM_EVENT_BASE + 5) #define DEMAPPS_ENTER_SLEEPEXIT (SMEM_LOG_DEM_EVENT_BASE + 6) #define DEMAPPS_END_APPS_SLEEP (SMEM_LOG_DEM_EVENT_BASE + 7) #define DEMAPPS_SETUP_APPS_PWRCLPS (SMEM_LOG_DEM_EVENT_BASE + 8) #define DEMAPPS_PWRCLPS_EARLY_EXIT (SMEM_LOG_DEM_EVENT_BASE + 9) #define DEMMOD_SEND_WAKEUP (SMEM_LOG_DEM_EVENT_BASE + 0xA) #define DEMMOD_NO_APPS_VOTE (SMEM_LOG_DEM_EVENT_BASE + 0xB) #define DEMMOD_NO_TCXO_SLEEP (SMEM_LOG_DEM_EVENT_BASE + 0xC) #define DEMMOD_BT_CLOCK (SMEM_LOG_DEM_EVENT_BASE + 0xD) #define DEMMOD_UART_CLOCK (SMEM_LOG_DEM_EVENT_BASE + 0xE) #define DEMMOD_OKTS (SMEM_LOG_DEM_EVENT_BASE + 0xF) #define DEM_SLEEP_INFO (SMEM_LOG_DEM_EVENT_BASE + 0x10) #define DEMMOD_TCXO_END (SMEM_LOG_DEM_EVENT_BASE + 0x11) #define DEMMOD_END_SLEEP_SIG (SMEM_LOG_DEM_EVENT_BASE + 0x12) #define DEMMOD_SETUP_APPSSLEEP (SMEM_LOG_DEM_EVENT_BASE + 0x13) #define DEMMOD_ENTER_TCXO (SMEM_LOG_DEM_EVENT_BASE + 0x14) #define DEMMOD_WAKE_APPS (SMEM_LOG_DEM_EVENT_BASE + 0x15) #define DEMMOD_POWER_COLLAPSE_APPS (SMEM_LOG_DEM_EVENT_BASE + 0x16) #define DEMMOD_RESTORE_APPS_PWR (SMEM_LOG_DEM_EVENT_BASE + 0x17) #define DEMAPPS_ASSERT_OKTS (SMEM_LOG_DEM_EVENT_BASE + 0x18) #define DEMAPPS_RESTART_START_TIMER (SMEM_LOG_DEM_EVENT_BASE + 0x19) #define DEMAPPS_ENTER_RUN (SMEM_LOG_DEM_EVENT_BASE + 0x1A) #define DEMMOD_MAO_INTS (SMEM_LOG_DEM_EVENT_BASE + 0x1B) #define DEMMOD_POWERUP_APPS_CALLED (SMEM_LOG_DEM_EVENT_BASE + 0x1C) #define DEMMOD_PC_TIMER_EXPIRED (SMEM_LOG_DEM_EVENT_BASE + 0x1D) #define DEM_DETECT_SLEEPEXIT (SMEM_LOG_DEM_EVENT_BASE + 0x1E) #define DEM_DETECT_RUN (SMEM_LOG_DEM_EVENT_BASE + 0x1F) #define DEM_SET_APPS_TIMER (SMEM_LOG_DEM_EVENT_BASE + 0x20) #define DEM_NEGATE_OKTS (SMEM_LOG_DEM_EVENT_BASE + 0x21) #define DEMMOD_APPS_WAKEUP_INT (SMEM_LOG_DEM_EVENT_BASE + 0x22) #define DEMMOD_APPS_SWFI (SMEM_LOG_DEM_EVENT_BASE + 0x23) #define DEM_SEND_BATTERY_INFO (SMEM_LOG_DEM_EVENT_BASE + 0x24) #define DEM_SMI_CLK_DISABLED (SMEM_LOG_DEM_EVENT_BASE + 0x25) #define DEM_SMI_CLK_ENABLED (SMEM_LOG_DEM_EVENT_BASE + 0x26) #define DEMAPPS_SETUP_APPS_SUSPEND (SMEM_LOG_DEM_EVENT_BASE + 0x27) #define DEM_RPC_EARLY_EXIT (SMEM_LOG_DEM_EVENT_BASE + 0x28) #define DEMAPPS_WAKEUP_REASON (SMEM_LOG_DEM_EVENT_BASE + 0x29) #define DEM_INIT (SMEM_LOG_DEM_EVENT_BASE + 0x30) #endif #define DEMMOD_UMTS_BASE (SMEM_LOG_DEM_EVENT_BASE + 0x8000) #define DEMMOD_GL1_GO_TO_SLEEP (DEMMOD_UMTS_BASE + 0x0000) #define DEMMOD_GL1_SLEEP_START (DEMMOD_UMTS_BASE + 0x0001) Loading Loading
arch/arm/mach-msm/Kconfig +0 −30 Original line number Diff line number Diff line Loading @@ -615,20 +615,6 @@ config MSM_SMD used to communicate with various services on the baseband processor. choice prompt "MSM Shared memory interface version" depends on MSM_SMD default MSM_SMD_PKG4 config MSM_SMD_PKG3 bool prompt "Package 3" config MSM_SMD_PKG4 bool prompt "Package 4" endchoice config MSM_PCIE bool "MSM PCIe Controller driver" depends on PCI && PCI_MSI Loading @@ -655,22 +641,6 @@ config MSM_BAM_DMUX provides a means to support more logical channels via muxing than BAM could without muxing. config MSM_N_WAY_SMD depends on MSM_SMD default y bool "MSM N-WAY SMD support" help Supports APPS-QDSP SMD communication along with normal APPS-MODEM SMD communication. config MSM_N_WAY_SMSM depends on MSM_SMD default y bool "MSM N-WAY SMSM support" help Supports APPS-QDSP SMSM communication along with normal APPS-MODEM SMSM communication. config MSM_SMP2P bool "SMSM Point-to-Point (SMP2P)" depends on MSM_SMD Loading
arch/arm/mach-msm/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -31,7 +31,7 @@ target += smd_rpc_sym.c $(obj)/smd_rpc_sym.c: $(src)/smd_rpc_sym $(src)/mkrpcsym.pl $(call if_changed,mkrpcsym) obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o smd_private.o smd_init_dt.o smd_init_plat.o smsm_debug.o obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o smd_private.o smd_init_dt.o smsm_debug.o obj-$(CONFIG_MSM_SMP2P) += smp2p.o smp2p_debug.o smp2p_gpio.o obj-$(CONFIG_MSM_SMP2P_TEST) += smp2p_loopback.o smp2p_test.o smp2p_gpio_test.o smp2p_spinlock_test.o obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o Loading
arch/arm/mach-msm/include/mach/msm_smd.h +0 −74 Original line number Diff line number Diff line Loading @@ -19,7 +19,6 @@ #define __ASM_ARCH_MSM_SMD_H #include <linux/io.h> #include <linux/notifier.h> #include <soc/msm/smem.h> Loading Loading @@ -75,73 +74,9 @@ enum { SMD_WCNSS_RPM, SMD_TZ_RPM, SMD_NUM_TYPE, SMD_LOOPBACK_TYPE = 100, }; /* * SMD IRQ Configuration * * Used to initialize IRQ configurations from platform data * * @irq_name: irq_name to query platform data * @irq_id: initialized to -1 in platform data, stores actual irq id on * successful registration * @out_base: if not null then settings used for outgoing interrupt * initialied from platform data */ struct smd_irq_config { /* incoming interrupt config */ const char *irq_name; unsigned long flags; int irq_id; const char *device_name; const void *dev_id; /* outgoing interrupt config */ uint32_t out_bit_pos; void __iomem *out_base; uint32_t out_offset; }; /* * SMD subsystem configurations * * SMD subsystems configurations for platform data. This contains the * M2A and A2M interrupt configurations for both SMD and SMSM per * subsystem. * * @subsys_name: name of subsystem passed to PIL * @irq_config_id: unique id for each subsystem * @edge: maps to actual remote subsystem edge * */ struct smd_subsystem_config { unsigned irq_config_id; const char *subsys_name; int edge; struct smd_irq_config smd_int; struct smd_irq_config smsm_int; }; /* * Subsystem Restart Configuration * * @disable_smsm_reset_handshake */ struct smd_subsystem_restart_config { int disable_smsm_reset_handshake; }; struct smd_platform { uint32_t num_ss_configs; struct smd_subsystem_config *smd_ss_configs; struct smd_subsystem_restart_config *smd_ssr_config; }; #ifdef CONFIG_MSM_SMD int smd_close(smd_channel_t *ch); Loading Loading @@ -172,15 +107,6 @@ int smd_read_avail(smd_channel_t *ch); */ int smd_cur_packet_size(smd_channel_t *ch); #if 0 /* these are interruptable waits which will block you until the specified ** number of bytes are readable or writable. */ int smd_wait_until_readable(smd_channel_t *ch, int bytes); int smd_wait_until_writable(smd_channel_t *ch, int bytes); #endif /* these are used to get and set the IF sigs of a channel. * DTR and RTS can be set; DSR, CTS, CD and RI can be read. */ Loading
arch/arm/mach-msm/include/mach/msm_smsm.h +0 −60 Original line number Diff line number Diff line Loading @@ -13,11 +13,8 @@ #ifndef _ARCH_ARM_MACH_MSM_SMSM_H_ #define _ARCH_ARM_MACH_MSM_SMSM_H_ #include <linux/notifier.h> #include <soc/msm/smem.h> #if defined(CONFIG_MSM_N_WAY_SMSM) enum { SMSM_APPS_STATE, SMSM_MODEM_STATE, Loading @@ -31,13 +28,6 @@ enum { SMSM_TIME_MASTER_DEM, }; extern uint32_t SMSM_NUM_ENTRIES; #else enum { SMSM_APPS_STATE = 1, SMSM_MODEM_STATE = 3, SMSM_NUM_ENTRIES, }; #endif /* * Ordered by when processors adopted the SMSM protocol. May not be 1-to-1 Loading @@ -53,63 +43,19 @@ enum { extern uint32_t SMSM_NUM_HOSTS; #define SMSM_INIT 0x00000001 #define SMSM_OSENTERED 0x00000002 #define SMSM_SMDWAIT 0x00000004 #define SMSM_SMDINIT 0x00000008 #define SMSM_RPCWAIT 0x00000010 #define SMSM_RPCINIT 0x00000020 #define SMSM_RESET 0x00000040 #define SMSM_RSA 0x00000080 #define SMSM_RUN 0x00000100 #define SMSM_PWRC 0x00000200 #define SMSM_TIMEWAIT 0x00000400 #define SMSM_TIMEINIT 0x00000800 #define SMSM_PROC_AWAKE 0x00001000 #define SMSM_WFPI 0x00002000 #define SMSM_SLEEP 0x00004000 #define SMSM_SLEEPEXIT 0x00008000 #define SMSM_OEMSBL_RELEASE 0x00010000 #define SMSM_APPS_REBOOT 0x00020000 #define SMSM_SYSTEM_POWER_DOWN 0x00040000 #define SMSM_SYSTEM_REBOOT 0x00080000 #define SMSM_SYSTEM_DOWNLOAD 0x00100000 #define SMSM_PWRC_SUSPEND 0x00200000 #define SMSM_APPS_SHUTDOWN 0x00400000 #define SMSM_SMD_LOOPBACK 0x00800000 #define SMSM_RUN_QUIET 0x01000000 #define SMSM_MODEM_WAIT 0x02000000 #define SMSM_MODEM_BREAK 0x04000000 #define SMSM_MODEM_CONTINUE 0x08000000 #define SMSM_SYSTEM_REBOOT_USR 0x20000000 #define SMSM_SYSTEM_PWRDWN_USR 0x40000000 #define SMSM_UNKNOWN 0x80000000 #define SMSM_WKUP_REASON_RPC 0x00000001 #define SMSM_WKUP_REASON_INT 0x00000002 #define SMSM_WKUP_REASON_GPIO 0x00000004 #define SMSM_WKUP_REASON_TIMER 0x00000008 #define SMSM_WKUP_REASON_ALARM 0x00000010 #define SMSM_WKUP_REASON_RESET 0x00000020 #define SMSM_USB_PLUG_UNPLUG 0x00002000 #define SMSM_A2_RESET_BAM 0x00004000 #define SMSM_VENDOR 0x00020000 #define SMSM_A2_POWER_CONTROL 0x00000002 #define SMSM_A2_POWER_CONTROL_ACK 0x00000800 #define SMSM_WLAN_TX_RINGS_EMPTY 0x00000200 #define SMSM_WLAN_TX_ENABLE 0x00000400 #define SMSM_SUBSYS2AP_STATUS 0x00008000 enum { SMEM_APPS_Q6_SMSM = 3, SMEM_Q6_APPS_SMSM = 5, SMSM_NUM_INTR_MUX = 8, }; #ifdef CONFIG_MSM_SMD int smsm_change_state(uint32_t smsm_entry, uint32_t clear_mask, uint32_t set_mask); Loading Loading @@ -137,12 +83,6 @@ int smsm_state_cb_register(uint32_t smsm_entry, uint32_t mask, void *data); int smsm_state_cb_deregister(uint32_t smsm_entry, uint32_t mask, void (*notify)(void *, uint32_t, uint32_t), void *data); void smsm_reset_modem(unsigned mode); void smsm_reset_modem_cont(void); void smd_sleep_exit(void); int smsm_check_for_modem_crash(void); #else static inline int smsm_change_state(uint32_t smsm_entry, Loading
arch/arm/mach-msm/include/mach/smem_log.h +0 −45 Original line number Diff line number Diff line Loading @@ -54,7 +54,6 @@ #define SMEM_LOG_IPC_ROUTER_EVENT_BASE 0x000D0000 #define SMEM_LOG_QMI_CCI_EVENT_BASE 0x000E0000 #define SMEM_LOG_QMI_CSI_EVENT_BASE 0x000F0000 #if defined(CONFIG_MSM_N_WAY_SMSM) #define DEM_SMSM_ISR (SMEM_LOG_DEM_EVENT_BASE + 0x1) #define DEM_STATE_CHANGE (SMEM_LOG_DEM_EVENT_BASE + 0x2) #define DEM_STATE_MACHINE_ENTER (SMEM_LOG_DEM_EVENT_BASE + 0x3) Loading Loading @@ -92,50 +91,6 @@ #define DEM_TIME_SYNC_POLL (SMEM_LOG_DEM_EVENT_BASE + 0x22) #define DEM_TIME_SYNC_INIT (SMEM_LOG_DEM_EVENT_BASE + 0x23) #define DEM_INIT (SMEM_LOG_DEM_EVENT_BASE + 0x25) #else #define DEM_NO_SLEEP (SMEM_LOG_DEM_EVENT_BASE + 1) #define DEM_INSUF_TIME (SMEM_LOG_DEM_EVENT_BASE + 2) #define DEMAPPS_ENTER_SLEEP (SMEM_LOG_DEM_EVENT_BASE + 3) #define DEMAPPS_DETECT_WAKEUP (SMEM_LOG_DEM_EVENT_BASE + 4) #define DEMAPPS_END_APPS_TCXO (SMEM_LOG_DEM_EVENT_BASE + 5) #define DEMAPPS_ENTER_SLEEPEXIT (SMEM_LOG_DEM_EVENT_BASE + 6) #define DEMAPPS_END_APPS_SLEEP (SMEM_LOG_DEM_EVENT_BASE + 7) #define DEMAPPS_SETUP_APPS_PWRCLPS (SMEM_LOG_DEM_EVENT_BASE + 8) #define DEMAPPS_PWRCLPS_EARLY_EXIT (SMEM_LOG_DEM_EVENT_BASE + 9) #define DEMMOD_SEND_WAKEUP (SMEM_LOG_DEM_EVENT_BASE + 0xA) #define DEMMOD_NO_APPS_VOTE (SMEM_LOG_DEM_EVENT_BASE + 0xB) #define DEMMOD_NO_TCXO_SLEEP (SMEM_LOG_DEM_EVENT_BASE + 0xC) #define DEMMOD_BT_CLOCK (SMEM_LOG_DEM_EVENT_BASE + 0xD) #define DEMMOD_UART_CLOCK (SMEM_LOG_DEM_EVENT_BASE + 0xE) #define DEMMOD_OKTS (SMEM_LOG_DEM_EVENT_BASE + 0xF) #define DEM_SLEEP_INFO (SMEM_LOG_DEM_EVENT_BASE + 0x10) #define DEMMOD_TCXO_END (SMEM_LOG_DEM_EVENT_BASE + 0x11) #define DEMMOD_END_SLEEP_SIG (SMEM_LOG_DEM_EVENT_BASE + 0x12) #define DEMMOD_SETUP_APPSSLEEP (SMEM_LOG_DEM_EVENT_BASE + 0x13) #define DEMMOD_ENTER_TCXO (SMEM_LOG_DEM_EVENT_BASE + 0x14) #define DEMMOD_WAKE_APPS (SMEM_LOG_DEM_EVENT_BASE + 0x15) #define DEMMOD_POWER_COLLAPSE_APPS (SMEM_LOG_DEM_EVENT_BASE + 0x16) #define DEMMOD_RESTORE_APPS_PWR (SMEM_LOG_DEM_EVENT_BASE + 0x17) #define DEMAPPS_ASSERT_OKTS (SMEM_LOG_DEM_EVENT_BASE + 0x18) #define DEMAPPS_RESTART_START_TIMER (SMEM_LOG_DEM_EVENT_BASE + 0x19) #define DEMAPPS_ENTER_RUN (SMEM_LOG_DEM_EVENT_BASE + 0x1A) #define DEMMOD_MAO_INTS (SMEM_LOG_DEM_EVENT_BASE + 0x1B) #define DEMMOD_POWERUP_APPS_CALLED (SMEM_LOG_DEM_EVENT_BASE + 0x1C) #define DEMMOD_PC_TIMER_EXPIRED (SMEM_LOG_DEM_EVENT_BASE + 0x1D) #define DEM_DETECT_SLEEPEXIT (SMEM_LOG_DEM_EVENT_BASE + 0x1E) #define DEM_DETECT_RUN (SMEM_LOG_DEM_EVENT_BASE + 0x1F) #define DEM_SET_APPS_TIMER (SMEM_LOG_DEM_EVENT_BASE + 0x20) #define DEM_NEGATE_OKTS (SMEM_LOG_DEM_EVENT_BASE + 0x21) #define DEMMOD_APPS_WAKEUP_INT (SMEM_LOG_DEM_EVENT_BASE + 0x22) #define DEMMOD_APPS_SWFI (SMEM_LOG_DEM_EVENT_BASE + 0x23) #define DEM_SEND_BATTERY_INFO (SMEM_LOG_DEM_EVENT_BASE + 0x24) #define DEM_SMI_CLK_DISABLED (SMEM_LOG_DEM_EVENT_BASE + 0x25) #define DEM_SMI_CLK_ENABLED (SMEM_LOG_DEM_EVENT_BASE + 0x26) #define DEMAPPS_SETUP_APPS_SUSPEND (SMEM_LOG_DEM_EVENT_BASE + 0x27) #define DEM_RPC_EARLY_EXIT (SMEM_LOG_DEM_EVENT_BASE + 0x28) #define DEMAPPS_WAKEUP_REASON (SMEM_LOG_DEM_EVENT_BASE + 0x29) #define DEM_INIT (SMEM_LOG_DEM_EVENT_BASE + 0x30) #endif #define DEMMOD_UMTS_BASE (SMEM_LOG_DEM_EVENT_BASE + 0x8000) #define DEMMOD_GL1_GO_TO_SLEEP (DEMMOD_UMTS_BASE + 0x0000) #define DEMMOD_GL1_SLEEP_START (DEMMOD_UMTS_BASE + 0x0001) Loading