Loading sound/soc/codecs/wcd9330.c +88 −9 Original line number Diff line number Diff line Loading @@ -164,16 +164,31 @@ static struct afe_param_cdc_reg_cfg audio_reg_cfg[] = { (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_MASK0), MAD_CLIP_INT_MASK_REG, 0x10, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_MASK0), MAD2_CLIP_INT_MASK_REG, 0x20, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_STATUS0), MAD_CLIP_INT_STATUS_REG, 0x10, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_STATUS0), MAD2_CLIP_INT_STATUS_REG, 0x20, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_CLEAR0), MAD_CLIP_INT_CLEAR_REG, 0x10, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_CLEAR0), MAD2_CLIP_INT_CLEAR_REG, 0x20, 8, 0 }, }; static struct afe_param_cdc_reg_cfg clip_reg_cfg[] = { Loading @@ -185,44 +200,106 @@ static struct afe_param_cdc_reg_cfg clip_reg_cfg[] = { }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL0), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL0), SPKR_CLIPDET_VAL0, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL1), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL1), SPKR_CLIPDET_VAL1, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL2), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL2), SPKR_CLIPDET_VAL2, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL3), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL3), SPKR_CLIPDET_VAL3, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL4), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL4), SPKR_CLIPDET_VAL4, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL5), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL5), SPKR_CLIPDET_VAL5, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL6), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL6), SPKR_CLIPDET_VAL6, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL7), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL7), SPKR_CLIPDET_VAL7, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_B1_CTL), SPKR2_CLIP_PIPE_BANK_SEL, 0x3, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL0), SPKR2_CLIPDET_VAL0, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL1), SPKR2_CLIPDET_VAL1, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL2), SPKR2_CLIPDET_VAL2, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL3), SPKR2_CLIPDET_VAL3, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL4), SPKR2_CLIPDET_VAL4, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL5), SPKR2_CLIPDET_VAL5, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL6), SPKR2_CLIPDET_VAL6, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL7), SPKR2_CLIPDET_VAL7, 0xff, 8, 0 }, }; static struct afe_param_cdc_reg_cfg_data tomtom_audio_reg_cfg = { Loading Loading @@ -7302,6 +7379,8 @@ static const struct wcd9xxx_reg_mask_val tomtom_codec_reg_init_val[] = { /* set MAD input MIC to DMIC1 */ {TOMTOM_A_CDC_MAD_INP_SEL, 0x0F, 0x08}, {TOMTOM_A_INTR_MODE, 0x04, 0x04}, }; static const struct wcd9xxx_reg_mask_val tomtom_codec_2_0_reg_init_val[] = { Loading sound/soc/codecs/wcd9xxx-common.h +17 −0 Original line number Diff line number Diff line Loading @@ -261,6 +261,23 @@ enum { SPKR_CLIPDET_VAL5, SPKR_CLIPDET_VAL6, SPKR_CLIPDET_VAL7, VBAT_RELEASE_INT_DEST_SELECT_REG, VBAT_RELEASE_INT_MASK_REG, VBAT_RELEASE_INT_STATUS_REG, VBAT_RELEASE_INT_CLEAR_REG, MAD2_CLIP_INT_DEST_SELECT_REG, MAD2_CLIP_INT_MASK_REG, MAD2_CLIP_INT_STATUS_REG, MAD2_CLIP_INT_CLEAR_REG, SPKR2_CLIP_PIPE_BANK_SEL, SPKR2_CLIPDET_VAL0, SPKR2_CLIPDET_VAL1, SPKR2_CLIPDET_VAL2, SPKR2_CLIPDET_VAL3, SPKR2_CLIPDET_VAL4, SPKR2_CLIPDET_VAL5, SPKR2_CLIPDET_VAL6, SPKR2_CLIPDET_VAL7, MAX_CFG_REGISTERS, }; Loading Loading
sound/soc/codecs/wcd9330.c +88 −9 Original line number Diff line number Diff line Loading @@ -164,16 +164,31 @@ static struct afe_param_cdc_reg_cfg audio_reg_cfg[] = { (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_MASK0), MAD_CLIP_INT_MASK_REG, 0x10, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_MASK0), MAD2_CLIP_INT_MASK_REG, 0x20, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_STATUS0), MAD_CLIP_INT_STATUS_REG, 0x10, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_STATUS0), MAD2_CLIP_INT_STATUS_REG, 0x20, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_CLEAR0), MAD_CLIP_INT_CLEAR_REG, 0x10, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_INTR2_CLEAR0), MAD2_CLIP_INT_CLEAR_REG, 0x20, 8, 0 }, }; static struct afe_param_cdc_reg_cfg clip_reg_cfg[] = { Loading @@ -185,44 +200,106 @@ static struct afe_param_cdc_reg_cfg clip_reg_cfg[] = { }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL0), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL0), SPKR_CLIPDET_VAL0, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL1), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL1), SPKR_CLIPDET_VAL1, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL2), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL2), SPKR_CLIPDET_VAL2, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL3), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL3), SPKR_CLIPDET_VAL3, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL4), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL4), SPKR_CLIPDET_VAL4, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL5), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL5), SPKR_CLIPDET_VAL5, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL6), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL6), SPKR_CLIPDET_VAL6, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL7), (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR_CLIPDET_VAL7), SPKR_CLIPDET_VAL7, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_B1_CTL), SPKR2_CLIP_PIPE_BANK_SEL, 0x3, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL0), SPKR2_CLIPDET_VAL0, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL1), SPKR2_CLIPDET_VAL1, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL2), SPKR2_CLIPDET_VAL2, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL3), SPKR2_CLIPDET_VAL3, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL4), SPKR2_CLIPDET_VAL4, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL5), SPKR2_CLIPDET_VAL5, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL6), SPKR2_CLIPDET_VAL6, 0xff, 8, 0 }, { 1, (TOMTOM_REGISTER_START_OFFSET + TOMTOM_A_CDC_SPKR2_CLIPDET_VAL7), SPKR2_CLIPDET_VAL7, 0xff, 8, 0 }, }; static struct afe_param_cdc_reg_cfg_data tomtom_audio_reg_cfg = { Loading Loading @@ -7302,6 +7379,8 @@ static const struct wcd9xxx_reg_mask_val tomtom_codec_reg_init_val[] = { /* set MAD input MIC to DMIC1 */ {TOMTOM_A_CDC_MAD_INP_SEL, 0x0F, 0x08}, {TOMTOM_A_INTR_MODE, 0x04, 0x04}, }; static const struct wcd9xxx_reg_mask_val tomtom_codec_2_0_reg_init_val[] = { Loading
sound/soc/codecs/wcd9xxx-common.h +17 −0 Original line number Diff line number Diff line Loading @@ -261,6 +261,23 @@ enum { SPKR_CLIPDET_VAL5, SPKR_CLIPDET_VAL6, SPKR_CLIPDET_VAL7, VBAT_RELEASE_INT_DEST_SELECT_REG, VBAT_RELEASE_INT_MASK_REG, VBAT_RELEASE_INT_STATUS_REG, VBAT_RELEASE_INT_CLEAR_REG, MAD2_CLIP_INT_DEST_SELECT_REG, MAD2_CLIP_INT_MASK_REG, MAD2_CLIP_INT_STATUS_REG, MAD2_CLIP_INT_CLEAR_REG, SPKR2_CLIP_PIPE_BANK_SEL, SPKR2_CLIPDET_VAL0, SPKR2_CLIPDET_VAL1, SPKR2_CLIPDET_VAL2, SPKR2_CLIPDET_VAL3, SPKR2_CLIPDET_VAL4, SPKR2_CLIPDET_VAL5, SPKR2_CLIPDET_VAL6, SPKR2_CLIPDET_VAL7, MAX_CFG_REGISTERS, }; Loading