Merge "ARM: dts: msm: Add ref_clk entry to UFS clock table on 8084"

		vccq2-max-microamp = <145000>;

		vccq2-max-microamp = <145000>;

		clock-names = "core_clk_src", "core_clk", "bus_clk", "iface_clk",

		clock-names = "core_clk_src", "core_clk", "bus_clk", "iface_clk",

				"rx_lane0_sync_clk", "tx_lane0_sync_clk",

				"ref_clk", "rx_lane0_sync_clk", "tx_lane0_sync_clk",

				"rx_lane1_sync_clk", "tx_lane1_sync_clk";

				"rx_lane1_sync_clk", "tx_lane1_sync_clk";

		max-clock-frequency-hz = <200000000>, <0>, <0>, <0>,

		max-clock-frequency-hz = <200000000>, <0>, <0>, <0>,

						<0>, <0>, <0>, <0>;

						<0>, <0>, <0>, <0>, <0>;

		status = "disabled";

		status = "disabled";

	};

	};