Loading arch/arm/boot/dts/qcom/msm8939-sim.dts +1 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ &usb_otg { interrupts = <0 134 0>; interrupt-names = "core_irq"; qcom,hsusb-otg-otg-control = <1>; }; &blsp1_uart2 { Loading arch/arm/boot/dts/qcom/msm8939.dtsi +5 −2 Original line number Diff line number Diff line Loading @@ -965,10 +965,13 @@ HSUSB_3p3-supply = <&pm8916_l13>; qcom,vdd-voltage-level = <1 5 7>; qcom,hsusb-otg-phy-init-seq = <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>; qcom,hsusb-otg-phy-type = <2>; qcom,hsusb-otg-mode = <1>; qcom,hsusb-otg-otg-control = <1>; qcom,hsusb-otg-disable-reset; qcom,hsusb-otg-otg-control = <3>; qcom,ahb-async-bridge-bypass; qcom,dp-manual-pullup; qcom,msm-bus,name = "usb2"; qcom,msm-bus,num-cases = <3>; Loading Loading
arch/arm/boot/dts/qcom/msm8939-sim.dts +1 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ &usb_otg { interrupts = <0 134 0>; interrupt-names = "core_irq"; qcom,hsusb-otg-otg-control = <1>; }; &blsp1_uart2 { Loading
arch/arm/boot/dts/qcom/msm8939.dtsi +5 −2 Original line number Diff line number Diff line Loading @@ -965,10 +965,13 @@ HSUSB_3p3-supply = <&pm8916_l13>; qcom,vdd-voltage-level = <1 5 7>; qcom,hsusb-otg-phy-init-seq = <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>; qcom,hsusb-otg-phy-type = <2>; qcom,hsusb-otg-mode = <1>; qcom,hsusb-otg-otg-control = <1>; qcom,hsusb-otg-disable-reset; qcom,hsusb-otg-otg-control = <3>; qcom,ahb-async-bridge-bypass; qcom,dp-manual-pullup; qcom,msm-bus,name = "usb2"; qcom,msm-bus,num-cases = <3>; Loading