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Commit 4812b01f authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: display: 8092: Update pipe-flush sel reg for VID pipe"

parents 6ca52142 99ddbe0d

drivers/video/msm/mdss/mdss_mdp_hwio.h

+3 −0
Original line number Diff line number Diff line
@@ -215,6 +215,9 @@ enum mdss_mdp_sspp_chroma_samp_type { 
#define MDSS_MDP_REG_VIG_MEM_COL_BASE			0x288

#define MDSS_MDP_REG_VIG_PA_BASE			0x310



/* in mpq product */

#define MDSS_MDP_REG_VIG_FLUSH_SEL			0x204



#define MDSS_MDP_VIG_OP_PA_SAT_ZERO_EXP_EN		BIT(2)

#define MDSS_MDP_VIG_OP_PA_MEM_PROTECT_EN		BIT(3)

#define MDSS_MDP_VIG_OP_PA_EN				BIT(4)

drivers/video/msm/mdss/mdss_mdp_pipe.c

+5 −0
Original line number Diff line number Diff line
@@ -1075,6 +1075,11 @@ static int mdss_mdp_src_addr_setup(struct mdss_mdp_pipe *pipe, 
	mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC2_ADDR, data.p[2].addr);

	mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_SSPP_SRC3_ADDR, data.p[3].addr);



	/* Flush Sel register only exists in mpq */

	if ((mdata->mdp_rev == MDSS_MDP_HW_REV_200) &&

		(pipe->flags & MDP_VPU_PIPE))

		mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_VIG_FLUSH_SEL, 0);



	return 0;

}

include/uapi/linux/msm_mdp.h

+1 −0
Original line number Diff line number Diff line
@@ -180,6 +180,7 @@ enum { 
#define MDP_BLEND_FG_PREMULT 0x20000

#define MDP_IS_FG 0x40000

#define MDP_SOLID_FILL 0x00000020

#define MDP_VPU_PIPE 0x00000040

#define MDP_DEINTERLACE 0x80000000

#define MDP_SHARPENING  0x40000000

#define MDP_NO_DMA_BARRIER_START	0x20000000