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Commit 47f44133 authored by Ravit Katzav's avatar Ravit Katzav
Browse files

msm: ipa: add support for msm bus scaling



IPA driver adds bus bandwidth request for krypton.
IPA driver needs to support two operating modes, one for nominal mode
operation, another for SVS mode.
Currently it always request bandwidth for nominal mode.

Change-Id: Ib0737393e76dbefd26b647c116e2c82a1817e39c
Signed-off-by: default avatarRavit Katzav <rkatzav@codeaurora.org>
parent f01d1b33
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+1 −60
Original line number Diff line number Diff line
@@ -67,65 +67,6 @@ static struct clk *sys_noc_ipa_axi_clk;
static struct clk *ipa_cnoc_clk;
static struct clk *ipa_inactivity_clk;

static struct msm_bus_vectors ipa_init_vectors[]  = {
	{
		.src = MSM_BUS_MASTER_IPA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 0,
		.ib = 0,
	},
	{
		.src = MSM_BUS_MASTER_BAM_DMA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 0,
		.ib = 0,
	},
	{
		.src = MSM_BUS_MASTER_BAM_DMA,
		.dst = MSM_BUS_SLAVE_OCIMEM,
		.ab = 0,
		.ib = 0,
	},
};

static struct msm_bus_vectors ipa_max_perf_vectors[]  = {
	{
		.src = MSM_BUS_MASTER_IPA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 50000000,
		.ib = 960000000,
	},
	{
		.src = MSM_BUS_MASTER_BAM_DMA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 50000000,
		.ib = 960000000,
	},
	{
		.src = MSM_BUS_MASTER_BAM_DMA,
		.dst = MSM_BUS_SLAVE_OCIMEM,
		.ab = 50000000,
		.ib = 960000000,
	},
};

static struct msm_bus_paths ipa_usecases[]  = {
	{
		ARRAY_SIZE(ipa_init_vectors),
		ipa_init_vectors,
	},
	{
		ARRAY_SIZE(ipa_max_perf_vectors),
		ipa_max_perf_vectors,
	},
};

static struct msm_bus_scale_pdata ipa_bus_client_pdata = {
	ipa_usecases,
	ARRAY_SIZE(ipa_usecases),
	.name = "ipa",
};

struct ipa_context *ipa_ctx;

static int ipa_load_pipe_connection(struct platform_device *pdev,
@@ -1798,7 +1739,7 @@ static int ipa_init(const struct ipa_plat_drv_res *resource_p,

	/* get BUS handle */
	ipa_ctx->ipa_bus_hdl =
		msm_bus_scale_register_client(&ipa_bus_client_pdata);
		msm_bus_scale_register_client(ipa_ctx->ctrl->msm_bus_data_ptr);
	if (!ipa_ctx->ipa_bus_hdl) {
		IPAERR("fail to register with bus mgr!\n");
		result = -ENODEV;
+1 −1
Original line number Diff line number Diff line
@@ -806,7 +806,7 @@ struct ipa_controller {
			const struct ipa_ep_cfg_metadata_mask *metadata_mask);
	void (*ipa_enable_clks)(void);
	void (*ipa_disable_clks)(void);

	struct msm_bus_scale_pdata *msm_bus_data_ptr;
};

extern struct ipa_context *ipa_ctx;
+111 −0
Original line number Diff line number Diff line
@@ -14,6 +14,8 @@
#include <linux/genalloc.h>	/* gen_pool_alloc() */
#include <linux/io.h>
#include <linux/ratelimit.h>
#include <mach/msm_bus.h>
#include <mach/msm_bus_board.h>
#include "ipa_i.h"

#define IPA_V1_CLK_RATE (92.31 * 1000 * 1000UL)
@@ -111,6 +113,112 @@ static const int ep_mapping[2][IPA_CLIENT_MAX] = {
	[IPA_2_0][IPA_CLIENT_Q6_WAN_CONS]        =  9,
};

static struct msm_bus_vectors ipa_init_vectors_v1_1[]  = {
	{
		.src = MSM_BUS_MASTER_IPA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 0,
		.ib = 0,
	},
	{
		.src = MSM_BUS_MASTER_BAM_DMA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 0,
		.ib = 0,
	},
	{
		.src = MSM_BUS_MASTER_BAM_DMA,
		.dst = MSM_BUS_SLAVE_OCIMEM,
		.ab = 0,
		.ib = 0,
	},
};

static struct msm_bus_vectors ipa_init_vectors_v2_0[]  = {
	{
		.src = MSM_BUS_MASTER_IPA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 0,
		.ib = 0,
	},
	{
		.src = MSM_BUS_MASTER_IPA,
		.dst = MSM_BUS_SLAVE_OCIMEM,
		.ab = 0,
		.ib = 0,
	},
};

static struct msm_bus_vectors ipa_max_perf_vectors_v1_1[]  = {
	{
		.src = MSM_BUS_MASTER_IPA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 50000000,
		.ib = 960000000,
	},
	{
		.src = MSM_BUS_MASTER_BAM_DMA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 50000000,
		.ib = 960000000,
	},
	{
		.src = MSM_BUS_MASTER_BAM_DMA,
		.dst = MSM_BUS_SLAVE_OCIMEM,
		.ab = 50000000,
		.ib = 960000000,
	},
};

static struct msm_bus_vectors ipa_nominal_perf_vectors_v2_0[]  = {
	{
		.src = MSM_BUS_MASTER_IPA,
		.dst = MSM_BUS_SLAVE_EBI_CH0,
		.ab = 100000000,
		.ib = 1300000000,
	},
	{
		.src = MSM_BUS_MASTER_IPA,
		.dst = MSM_BUS_SLAVE_OCIMEM,
		.ab = 100000000,
		.ib = 1300000000,
	},
};

static struct msm_bus_paths ipa_usecases_v1_1[]  = {
	{
		ARRAY_SIZE(ipa_init_vectors_v1_1),
		ipa_init_vectors_v1_1,
	},
	{
		ARRAY_SIZE(ipa_max_perf_vectors_v1_1),
		ipa_max_perf_vectors_v1_1,
	},
};

static struct msm_bus_paths ipa_usecases_v2_0[]  = {
	{
		ARRAY_SIZE(ipa_init_vectors_v2_0),
		ipa_init_vectors_v2_0,
	},
	{
		ARRAY_SIZE(ipa_nominal_perf_vectors_v2_0),
		ipa_nominal_perf_vectors_v2_0,
	},
};

static struct msm_bus_scale_pdata ipa_bus_client_pdata_v1_1 = {
	ipa_usecases_v1_1,
	ARRAY_SIZE(ipa_usecases_v1_1),
	.name = "ipa",
};

static struct msm_bus_scale_pdata ipa_bus_client_pdata_v2_0 = {
	ipa_usecases_v2_0,
	ARRAY_SIZE(ipa_usecases_v2_0),
	.name = "ipa",
};

/* read how much SRAM is available for SW use
 * In case of IPAv2.0 this will also supply an offset from
 * which we can start write
@@ -2793,6 +2901,7 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl,
		ctrl->ipa_commit_hdr = __ipa_commit_hdr_v1;
		ctrl->ipa_enable_clks = _ipa_enable_clks_v1;
		ctrl->ipa_disable_clks = _ipa_disable_clks_v1;
		ctrl->msm_bus_data_ptr = &ipa_bus_client_pdata_v1_1;
		break;
	case (IPA_HW_v1_1):
		ctrl->ipa_sram_read_settings = _ipa_sram_settings_read_v1_1;
@@ -2818,6 +2927,7 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl,
		ctrl->ipa_commit_hdr = __ipa_commit_hdr_v1;
		ctrl->ipa_enable_clks = _ipa_enable_clks_v1;
		ctrl->ipa_disable_clks = _ipa_disable_clks_v1;
		ctrl->msm_bus_data_ptr = &ipa_bus_client_pdata_v1_1;
		break;
	case (IPA_HW_v2_0):
		ctrl->ipa_sram_read_settings = _ipa_sram_settings_read_v2_0;
@@ -2843,6 +2953,7 @@ int ipa_controller_static_bind(struct ipa_controller *ctrl,
		ctrl->ipa_commit_hdr = __ipa_commit_hdr_v2;
		ctrl->ipa_enable_clks = _ipa_enable_clks_v2_0;
		ctrl->ipa_disable_clks = _ipa_disable_clks_v2_0;
		ctrl->msm_bus_data_ptr = &ipa_bus_client_pdata_v2_0;
		break;
	default:
		return -EPERM;