Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 29 EXTRAVERSION = -rc6 EXTRAVERSION = -rc7 NAME = Erotic Pickled Herring # *DOCUMENTATION* Loading arch/arm/kernel/setup.c +7 −6 Original line number Diff line number Diff line Loading @@ -233,12 +233,13 @@ static void __init cacheid_init(void) unsigned int cachetype = read_cpuid_cachetype(); unsigned int arch = cpu_architecture(); if (arch >= CPU_ARCH_ARMv7) { if (arch >= CPU_ARCH_ARMv6) { if ((cachetype & (7 << 29)) == 4 << 29) { /* ARMv7 register format */ cacheid = CACHEID_VIPT_NONALIASING; if ((cachetype & (3 << 14)) == 1 << 14) cacheid |= CACHEID_ASID_TAGGED; } else if (arch >= CPU_ARCH_ARMv6) { if (cachetype & (1 << 23)) } else if (cachetype & (1 << 23)) cacheid = CACHEID_VIPT_ALIASING; else cacheid = CACHEID_VIPT_NONALIASING; Loading arch/arm/mach-at91/pm.c +0 −1 Original line number Diff line number Diff line Loading @@ -332,7 +332,6 @@ static int at91_pm_enter(suspend_state_t state) at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); error: sdram_selfrefresh_disable(); target_state = PM_SUSPEND_ON; at91_irq_resume(); at91_gpio_resume(); Loading arch/arm/mm/abort-ev6.S +2 −1 Original line number Diff line number Diff line Loading @@ -23,7 +23,8 @@ ENTRY(v6_early_abort) #ifdef CONFIG_CPU_32v6K clrex #else strex r0, r1, [sp] @ Clear the exclusive monitor sub r1, sp, #4 @ Get unused stack location strex r0, r1, [r1] @ Clear the exclusive monitor #endif mrc p15, 0, r1, c5, c0, 0 @ get FSR mrc p15, 0, r0, c6, c0, 0 @ get FAR Loading arch/arm/plat-s3c64xx/irq-eint.c +1 −1 Original line number Diff line number Diff line Loading @@ -55,7 +55,7 @@ static void s3c_irq_eint_unmask(unsigned int irq) u32 mask; mask = __raw_readl(S3C64XX_EINT0MASK); mask |= eint_irq_to_bit(irq); mask &= ~eint_irq_to_bit(irq); __raw_writel(mask, S3C64XX_EINT0MASK); } Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 29 EXTRAVERSION = -rc6 EXTRAVERSION = -rc7 NAME = Erotic Pickled Herring # *DOCUMENTATION* Loading
arch/arm/kernel/setup.c +7 −6 Original line number Diff line number Diff line Loading @@ -233,12 +233,13 @@ static void __init cacheid_init(void) unsigned int cachetype = read_cpuid_cachetype(); unsigned int arch = cpu_architecture(); if (arch >= CPU_ARCH_ARMv7) { if (arch >= CPU_ARCH_ARMv6) { if ((cachetype & (7 << 29)) == 4 << 29) { /* ARMv7 register format */ cacheid = CACHEID_VIPT_NONALIASING; if ((cachetype & (3 << 14)) == 1 << 14) cacheid |= CACHEID_ASID_TAGGED; } else if (arch >= CPU_ARCH_ARMv6) { if (cachetype & (1 << 23)) } else if (cachetype & (1 << 23)) cacheid = CACHEID_VIPT_ALIASING; else cacheid = CACHEID_VIPT_NONALIASING; Loading
arch/arm/mach-at91/pm.c +0 −1 Original line number Diff line number Diff line Loading @@ -332,7 +332,6 @@ static int at91_pm_enter(suspend_state_t state) at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); error: sdram_selfrefresh_disable(); target_state = PM_SUSPEND_ON; at91_irq_resume(); at91_gpio_resume(); Loading
arch/arm/mm/abort-ev6.S +2 −1 Original line number Diff line number Diff line Loading @@ -23,7 +23,8 @@ ENTRY(v6_early_abort) #ifdef CONFIG_CPU_32v6K clrex #else strex r0, r1, [sp] @ Clear the exclusive monitor sub r1, sp, #4 @ Get unused stack location strex r0, r1, [r1] @ Clear the exclusive monitor #endif mrc p15, 0, r1, c5, c0, 0 @ get FSR mrc p15, 0, r0, c6, c0, 0 @ get FAR Loading
arch/arm/plat-s3c64xx/irq-eint.c +1 −1 Original line number Diff line number Diff line Loading @@ -55,7 +55,7 @@ static void s3c_irq_eint_unmask(unsigned int irq) u32 mask; mask = __raw_readl(S3C64XX_EINT0MASK); mask |= eint_irq_to_bit(irq); mask &= ~eint_irq_to_bit(irq); __raw_writel(mask, S3C64XX_EINT0MASK); } Loading