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Commit 47bd887e authored by Rohit Vaswani's avatar Rohit Vaswani
Browse files

ARM: dts: msm8994: Standarize the naming convention for blsp_uart 



Stick to a single naming convention for blsp_uart.
The numbering for the BLSP and the UART in the kernel begin at 1.
Also, use the correct clocks for blsp1_uart2

Change-Id: I058131579b50c1b8a42734784c37d34acec84e95
Signed-off-by: default avatarRohit Vaswani <rvaswani@codeaurora.org>
parent 60d75479

arch/arm/boot/dts/qcom/msm8994-rumi.dts

+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ 
	qcom,board-id = <15 0>;

};



&uartblsp1dm1 {

&blsp1_uart2 {

	status = "ok";

	pinctrl-names = "default";

	pinctrl-0 = <&uart_console_sleep>;

arch/arm/boot/dts/qcom/msm8994-sim.dts

+1 −1
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ 
	qcom,board-id = <16 0>;

};



&uartblsp1dm2 {

&blsp1_uart3 {

	status = "ok";

	pinctrl-names = "default";

	pinctrl-0 = <&uart_console_sleep>;

arch/arm/boot/dts/qcom/msm8994.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -351,7 +351,7 @@ 
	};





	uartblsp1dm2: serial@f991f000 {

	blsp1_uart3: serial@f991f000 {

		compatible = "qcom,msm-lsuart-v14";

		reg = <0xf991f000 0x1000>;

		interrupts = <0 109 0>;
@@ -361,13 +361,13 @@ 
			<&clock_gcc clk_gcc_blsp1_ahb_clk>;

	};



	uartblsp1dm1: serial@f991e000 {

	blsp1_uart2: serial@f991e000 {

		compatible = "qcom,msm-lsuart-v14";

		reg = <0xf991e000 0x1000>;

		interrupts = <0 108 0>;

		status = "disabled";

		clock-names = "core_clk", "iface_clk";

		clocks = <&clock_gcc clk_gcc_blsp1_uart3_apps_clk>,

		clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,

			<&clock_gcc clk_gcc_blsp1_ahb_clk>;

	};