Loading Documentation/devicetree/bindings/arm/msm/spm-v2.txt +8 −2 Original line number Diff line number Diff line Loading @@ -12,9 +12,13 @@ Required properties - compatible: "qcom,spm-v2" - reg: The physical address and the size of the SPM's memory mapped registers - qcom, core-id: The core id the SPM block is attached to. - qcom,cpu: phandle for the CPU that the SPM block is attached to. On targets that dont support CPU phandles the driver would support qcom,core-id. This field is required on only for SPMs that control the CPU. - qcom, core-id: This property will be deprecated once all targets start supporting CPU phandles. This field will be used to identify SPMs that control the CPU. {0..n} for cores {0..n} {0xffff} for L2 - qcom,saw2-ver-reg: The location of the version register - qcom,saw2-cfg: SAW2 configuration register - qcom,saw2-avs-ctl: The AVS control register Loading @@ -25,6 +29,8 @@ Required properties - qcom,saw2-spm-ctl: The SPM control register - qcom,saw2-vctl-timeout-us: The timeout value to wait for voltage to change after sending the voltage command to the PMIC - qcom,name: The name with which a SPM device is identified by the power management code. Optional properties Loading arch/arm/boot/dts/qcom/apq8084-pm.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9089000 0x1000>; qcom,name = "core0"; qcom,core-id = <0>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x01>; Loading @@ -39,6 +40,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9099000 0x1000>; qcom,name = "core1"; qcom,core-id = <1>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x01>; Loading @@ -62,6 +64,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90a9000 0x1000>; qcom,name = "core2"; qcom,core-id = <2>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x01>; Loading @@ -85,6 +88,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90b9000 0x1000>; qcom,name = "core3"; qcom,core-id = <3>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x01>; Loading @@ -108,6 +112,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9012000 0x1000>; qcom,name = "l2"; qcom,core-id = <0xffff>; /* L2/APCS SAW */ qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x14>; Loading arch/arm/boot/dts/qcom/mdm9630-pm.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9009000 0x1000>; qcom,name = "core0"; qcom,core-id = <0>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x101>; Loading arch/arm/boot/dts/qcom/msm8226-v1-pm.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9089000 0x1000>; qcom,name = "core0"; qcom,core-id = <0>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -33,6 +34,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9099000 0x1000>; qcom,name = "core1"; qcom,core-id = <1>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -50,6 +52,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90a9000 0x1000>; qcom,name = "core2"; qcom,core-id = <2>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -67,6 +70,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90b9000 0x1000>; qcom,name = "core3"; qcom,core-id = <3>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -84,6 +88,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9012000 0x1000>; qcom,name = "l2"; qcom,core-id = <0xffff>; /* L2/APCS SAW */ qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x14>; Loading arch/arm/boot/dts/qcom/msm8226-v2-pm.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9089000 0x1000>; qcom,name = "core0"; qcom,core-id = <0>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -33,6 +34,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9099000 0x1000>; qcom,name = "core1"; qcom,core-id = <1>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -50,6 +52,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90a9000 0x1000>; qcom,name = "core2"; qcom,core-id = <2>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -67,6 +70,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90b9000 0x1000>; qcom,name = "core3"; qcom,core-id = <3>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -84,6 +88,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9012000 0x1000>; qcom,name = "l2"; qcom,core-id = <0xffff>; /* L2/APCS SAW */ qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x14>; Loading Loading
Documentation/devicetree/bindings/arm/msm/spm-v2.txt +8 −2 Original line number Diff line number Diff line Loading @@ -12,9 +12,13 @@ Required properties - compatible: "qcom,spm-v2" - reg: The physical address and the size of the SPM's memory mapped registers - qcom, core-id: The core id the SPM block is attached to. - qcom,cpu: phandle for the CPU that the SPM block is attached to. On targets that dont support CPU phandles the driver would support qcom,core-id. This field is required on only for SPMs that control the CPU. - qcom, core-id: This property will be deprecated once all targets start supporting CPU phandles. This field will be used to identify SPMs that control the CPU. {0..n} for cores {0..n} {0xffff} for L2 - qcom,saw2-ver-reg: The location of the version register - qcom,saw2-cfg: SAW2 configuration register - qcom,saw2-avs-ctl: The AVS control register Loading @@ -25,6 +29,8 @@ Required properties - qcom,saw2-spm-ctl: The SPM control register - qcom,saw2-vctl-timeout-us: The timeout value to wait for voltage to change after sending the voltage command to the PMIC - qcom,name: The name with which a SPM device is identified by the power management code. Optional properties Loading
arch/arm/boot/dts/qcom/apq8084-pm.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9089000 0x1000>; qcom,name = "core0"; qcom,core-id = <0>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x01>; Loading @@ -39,6 +40,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9099000 0x1000>; qcom,name = "core1"; qcom,core-id = <1>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x01>; Loading @@ -62,6 +64,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90a9000 0x1000>; qcom,name = "core2"; qcom,core-id = <2>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x01>; Loading @@ -85,6 +88,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90b9000 0x1000>; qcom,name = "core3"; qcom,core-id = <3>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x01>; Loading @@ -108,6 +112,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9012000 0x1000>; qcom,name = "l2"; qcom,core-id = <0xffff>; /* L2/APCS SAW */ qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x14>; Loading
arch/arm/boot/dts/qcom/mdm9630-pm.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9009000 0x1000>; qcom,name = "core0"; qcom,core-id = <0>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x101>; Loading
arch/arm/boot/dts/qcom/msm8226-v1-pm.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9089000 0x1000>; qcom,name = "core0"; qcom,core-id = <0>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -33,6 +34,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9099000 0x1000>; qcom,name = "core1"; qcom,core-id = <1>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -50,6 +52,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90a9000 0x1000>; qcom,name = "core2"; qcom,core-id = <2>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -67,6 +70,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90b9000 0x1000>; qcom,name = "core3"; qcom,core-id = <3>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -84,6 +88,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9012000 0x1000>; qcom,name = "l2"; qcom,core-id = <0xffff>; /* L2/APCS SAW */ qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x14>; Loading
arch/arm/boot/dts/qcom/msm8226-v2-pm.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9089000 0x1000>; qcom,name = "core0"; qcom,core-id = <0>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -33,6 +34,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9099000 0x1000>; qcom,name = "core1"; qcom,core-id = <1>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -50,6 +52,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90a9000 0x1000>; qcom,name = "core2"; qcom,core-id = <2>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -67,6 +70,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf90b9000 0x1000>; qcom,name = "core3"; qcom,core-id = <3>; qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x00>; Loading @@ -84,6 +88,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xf9012000 0x1000>; qcom,name = "l2"; qcom,core-id = <0xffff>; /* L2/APCS SAW */ qcom,saw2-ver-reg = <0xfd0>; qcom,saw2-cfg = <0x14>; Loading