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Commit 4637a74c authored by David P. Reed's avatar David P. Reed Committed by Andi Kleen
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[PATCH] x86-64: Avoid overflows during apic timer calibration



- Use 64bit TSC calculations to avoid handling overflow
- Use 32bit unsigned arithmetic for the APIC timer. This
way overflows are handled correctly.
- Fix exit check of loop to account for apic timer counting down

Signed-off-by: default avatar <dpreed@reed.com>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent 9d016dd4
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+6 −5
Original line number Diff line number Diff line
@@ -839,14 +839,15 @@ static void setup_APIC_timer(unsigned int clocks)

static int __init calibrate_APIC_clock(void)
{
	int apic, apic_start, tsc, tsc_start;
	unsigned apic, apic_start;
	unsigned long tsc, tsc_start;
	int result;
	/*
	 * Put whatever arbitrary (but long enough) timeout
	 * value into the APIC clock, we just want to get the
	 * counter running for calibration.
	 */
	__setup_APIC_LVTT(1000000000);
	__setup_APIC_LVTT(4000000000);

	apic_start = apic_read(APIC_TMCCT);
#ifdef CONFIG_X86_PM_TIMER
@@ -857,13 +858,13 @@ static int __init calibrate_APIC_clock(void)
	} else
#endif
	{
		rdtscl(tsc_start);
		rdtscll(tsc_start);

		do {
			apic = apic_read(APIC_TMCCT);
			rdtscl(tsc);
			rdtscll(tsc);
		} while ((tsc - tsc_start) < TICK_COUNT &&
				(apic - apic_start) < TICK_COUNT);
				(apic_start - apic) < TICK_COUNT);

		result = (apic_start - apic) * 1000L * tsc_khz /
					(tsc - tsc_start);