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Commit 45e9f817 authored by Jeykumar Sankaran's avatar Jeykumar Sankaran
Browse files

ARM: dts: msm: Add PLL and PMIC values to msm8992 



Populate msm8992 DSI and HDMI nodes with PLL and PMIC values.

Change-Id: I817923cfe463077d35990ff21e29c2d67890eb58
Signed-off-by: default avatarJeykumar Sankaran <jsanka@codeaurora.org>
parent dca34e2b

arch/arm/boot/dts/qcom/msm8992-cdp.dtsi

+118 −0
Original line number Diff line number Diff line
@@ -12,6 +12,124 @@ 


#include "msm8992-pinctrl.dtsi"



#include "dsi-panel-sharp-dualmipi0-wqxga-video.dtsi"

#include "dsi-panel-sharp-dualmipi1-wqxga-video.dtsi"

#include "dsi-panel-jdi-dualmipi0-video.dtsi"

#include "dsi-panel-jdi-dualmipi1-video.dtsi"

#include "dsi-panel-jdi-dualmipi0-cmd.dtsi"

#include "dsi-panel-jdi-dualmipi1-cmd.dtsi"

#include "dsi-panel-nt35597-wqxga-video.dtsi"

#include "dsi-panel-nt35597-wqxga-cmd.dtsi"

#include "dsi-panel-jdi-1080p-video.dtsi"



&mdss_mdp {

	qcom,mdss-pref-prim-intf = "dsi";

};



&pmx_mdss {

	qcom,num-grp-pins = <1>;

	qcom,pins = <&gp 78>;

};



&pmx_mdss_te {

	qcom,num-grp-pins = <1>;

	qcom,pins = <&gp 10>;

};



&mdss_dsi0 {

	qcom,dsi-pref-prim-pan = <&dsi_dual_sharp_video_0>;

	pinctrl-names = "mdss_default", "mdss_sleep";

	pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;

	pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;

	qcom,dsi-panel-bias-vreg;

	qcom,platform-reset-gpio = <&msm_gpio 78 0>;

	qcom,platform-bklight-en-gpio = <&pmi8994_gpios 2 0>;

	qcom,platform-enable-gpio = <&pm8994_gpios 14 0>;

};



&mdss_dsi1 {

	qcom,dsi-pref-prim-pan = <&dsi_dual_sharp_video_1>;

};



&dsi_jdi_1080_vid {

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <4095>;

	qcom,cont-splash-enabled;

};



&dsi_dual_sharp_video_0 {

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <4095>;

};



&dsi_dual_jdi_video_0 {

	pwms = <&pmi8994_pwm_4 0 0>;

	pwm-names = "backlight";

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";

	qcom,mdss-dsi-bl-pwm-pmi;

	qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <4095>;

	qcom,5v-boost-gpio = <&pm8994_gpios 14 0>;

	qcom,cont-splash-enabled;

};



&dsi_dual_jdi_video_1 {

	qcom,cont-splash-enabled;

};



&dsi_dual_jdi_cmd_0 {

	pwms = <&pmi8994_pwm_4 0 0>;

	pwm-names = "backlight";

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";

	qcom,mdss-dsi-bl-pwm-pmi;

	qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <4095>;

	qcom,5v-boost-gpio = <&pm8994_gpios 14 0>;

	qcom,cont-splash-enabled;

	qcom,partial-update-enabled;

	qcom,panel-roi-alignment = <4 4 2 2 20 20>;

};



&dsi_dual_jdi_cmd_1 {

	qcom,cont-splash-enabled;

	qcom,partial-update-enabled;

	qcom,panel-roi-alignment = <4 4 2 2 20 20>;

};



&pmx_hdmi_cec {

	qcom,num-grp-pins = <1>;

	qcom,pins = <&gp 31>;

};



&pmx_hdmi_ddc {

	qcom,num-grp-pins = <2>;

	qcom,pins = <&gp 32>, <&gp 33>;

};



&pmx_hdmi_hpd {

	qcom,num-grp-pins = <1>;

	qcom,pins = <&gp 34>;

};



&mdss_hdmi_tx {

	pinctrl-names = "hdmi_hpd_active", "hdmi_ddc_active",

				"hdmi_cec_active", "hdmi_active",

				"hdmi_sleep";

	pinctrl-0 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_suspend

						&mdss_hdmi_cec_suspend>;

	pinctrl-1 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active

						&mdss_hdmi_cec_suspend>;

	pinctrl-2 = <&mdss_hdmi_hpd_active &mdss_hdmi_cec_active

						&mdss_hdmi_ddc_suspend>;

	pinctrl-3 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active

						&mdss_hdmi_cec_active>;

	pinctrl-4 = <&mdss_hdmi_hpd_suspend &mdss_hdmi_ddc_suspend

						&mdss_hdmi_cec_suspend>;

};

&blsp1_uart2 {

	status= "ok";

	pinctrl-names = "default";

arch/arm/boot/dts/qcom/msm8992-mdss-pll.dtsi

0 → 100644
+164 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2014, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	mdss_dsi0_pll: qcom,mdss_dsi_pll@fd994300 {

		compatible = "qcom,mdss_dsi_pll_8992";

		label = "MDSS DSI 0 PLL";

		cell-index = <0>;

		#clock-cells = <1>;



		reg = <0xfd994300 0x500>,

		      <0xfd994200 0x64>,

		      <0xfd996300 0x500>;

		reg-names = "pll_base", "dynamic_pll_base",

			"pll_1_base";



		gdsc-supply = <&gdsc_mdss>;

		vddio-supply = <&pm8994_l12>;

		vcca-supply = <&pm8994_l28>;



		clocks = <&clock_mmss clk_mdss_ahb_clk>;

		clock-names = "iface_clk";

		clock-rate = <0>;



		qcom,platform-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};



			qcom,platform-supply-entry@1 {

				reg = <1>;

				qcom,supply-name = "vddio";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

			};



			qcom,platform-supply-entry@2 {

				reg = <2>;

				qcom,supply-name = "vcca";

				qcom,supply-min-voltage = <1000000>;

				qcom,supply-max-voltage = <1000000>;

				qcom,supply-enable-load = <10000>;

				qcom,supply-disable-load = <100>;

			};

		};

	};

	mdss_dsi1_pll: qcom,mdss_dsi_pll@fd996300 {

		compatible = "qcom,mdss_dsi_pll_8992";

		label = "MDSS DSI 1 PLL";

		cell-index = <1>;

		#clock-cells = <1>;



		reg = <0xfd996300 0x500>;

		reg-names = "pll_base";



		gdsc-supply = <&gdsc_mdss>;

		vddio-supply = <&pm8994_l12>;

		vcca-supply = <&pm8994_l28>;



		clocks = <&clock_mmss clk_mdss_ahb_clk>;

		clock-names = "iface_clk";

		clock-rate = <0>;



		qcom,platform-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};



			qcom,platform-supply-entry@1 {

				reg = <1>;

				qcom,supply-name = "vddio";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

			};



			qcom,platform-supply-entry@2 {

				reg = <2>;

				qcom,supply-name = "vcca";

				qcom,supply-min-voltage = <1000000>;

				qcom,supply-max-voltage = <1000000>;

				qcom,supply-enable-load = <10000>;

				qcom,supply-disable-load = <100>;

			};

		};

	};



	mdss_hdmi_pll: qcom,mdss_hdmi_pll@0xfd9a0600 {

		compatible = "qcom,mdss_hdmi_pll_8992";

		label = "MDSS HDMI PLL";

		#clock-cells = <1>;



		reg = <0xfd9a0600 0xac4>, <0xfd9a1200 0x0C8>;

		reg-names = "pll_base", "phy_base";



		gdsc-supply = <&gdsc_mdss>;

		vddio-supply = <&pm8994_l12>;

		vcca-supply = <&pm8994_l28>;



		clocks = <&clock_mmss clk_mdss_ahb_clk>;

		clock-names = "iface_clk";

		clock-rate = <0>;



		qcom,platform-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};



			qcom,platform-supply-entry@1 {

				reg = <1>;

				qcom,supply-name = "vddio";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

			};



			qcom,platform-supply-entry@2 {

				reg = <2>;

				qcom,supply-name = "vcca";

				qcom,supply-min-voltage = <1000000>;

				qcom,supply-max-voltage = <1000000>;

				qcom,supply-enable-load = <10000>;

				qcom,supply-disable-load = <100>;

			};

		};

	};

};

arch/arm/boot/dts/qcom/msm8992-mdss.dtsi

+190 −19
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ 
		qcom,mdss-pipe-rgb-off = <0x00015000 0x00017000

					  0x00019000>;

		qcom,mdss-pipe-dma-off = <0x00025000 0x00027000>;

		qcom,mdss-pipe-cursor-off = <0x00035000>;



		qcom,mdss-pipe-vig-fetch-id = <1 4 7>;

		qcom,mdss-pipe-rgb-fetch-id = <16 17 18>;
@@ -57,6 +58,7 @@ 
		qcom,mdss-pipe-vig-xin-id = <0 4 8>;

		qcom,mdss-pipe-rgb-xin-id = <1 5 9>;

		qcom,mdss-pipe-dma-xin-id = <2 10>;

		qcom,mdss-pipe-cursor-xin-id = <7>;



		qcom,mdss-pipe-rgb-fixed-mmb =	<5 0 1 6 7 8>,

						<5 2 3 9 10 11>,
@@ -98,6 +100,7 @@ 
		/* These Offsets are relative to "mdp_phys" address */

		qcom,mdp-settings = <0x0117c 0x00005555>,

				    <0x01184 0xC000ff00>,

				    <0x011e0 0x000000a4>,

				    <0x011e4 0x00000000>,

				    <0x012ac 0xc0000ccc>,

				    <0x012b4 0xc0000ccc>,
@@ -133,7 +136,7 @@ 
		};

	};



	mdss_dsi0: qcom,mdss_dsi@fd998000 {

	mdss_dsi0: qcom,mdss_dsi@fd994000 {

		compatible = "qcom,mdss-dsi-ctrl";

		label = "MDSS DSI CTRL->0";

		cell-index = <0>;
@@ -142,26 +145,38 @@ 
			<0xfd828000 0x108>;

		reg-names = "dsi_ctrl", "dsi_phy", "mmss_misc_phys";

		gdsc-supply = <&gdsc_mdss>;

		qcom,mdss-mdp = <&mdss_mdp>;

		vdd-supply = <&pm8994_l14>;

		vddio-supply = <&pm8994_l12>;

		vdda-supply = <&pm8994_l2>;

		vcca-supply = <&pm8994_l28>;

		qcom,mdss-fb-map = <&mdss_fb0>;

		qcom,mdss-mdp = <&mdss_mdp>;

		clocks = <&clock_mmss clk_mdss_mdp_clk>,

			<&clock_mmss clk_mdss_ahb_clk>,

			<&clock_mmss clk_mmss_misc_ahb_clk>,

			<&clock_mmss clk_mdss_axi_clk>,

			<&clock_mmss clk_mdss_byte0_clk>,

			<&clock_mmss clk_mdss_pclk0_clk>,

			<&clock_mmss clk_mdss_esc0_clk>;

		clock-names = "mdp_core_clk", "iface_clk", "bus_clk",

			"byte_clk", "pixel_clk", "core_clk";

			<&clock_mmss clk_mdss_esc0_clk>,

			<&mdss_dsi0_pll clk_mdss_byte_clk_mux>,

			<&mdss_dsi0_pll clk_mdss_pixel_clk_mux>,

			<&mdss_dsi0_pll clk_byte_clk_src>,

			<&mdss_dsi0_pll clk_pixel_clk_src>,

			<&mdss_dsi1_pll clk_mdss_dsi1_vco_clk_src>;

		clock-names = "mdp_core_clk", "iface_clk",

			"core_mmss_clk", "bus_clk",

			"byte_clk", "pixel_clk", "core_clk",

			"mdss_byte_clk_mux", "mdss_pixel_clk_mux", "byte_clk_src",

			"pixel_clk_src", "clk_mdss_dsi1_vco_clk_src";



		qcom,platform-strength-ctrl = [77 00];

		qcom,platform-strength-ctrl = [77 06];

		qcom,platform-bist-ctrl = [00 00 b1 ff 00 00];

		qcom,platform-regulator-settings = [03 08 07 00 20 07 01];

		qcom,platform-lane-config = [02 00 00 00 20 00 00 00 00

			02 00 00 00 40 00 00 00 00

			02 00 00 40 20 00 00 00 00

			02 00 00 40 00 00 00 00 00

			00 00 00 80 00 00 00 00 00];

		qcom,platform-regulator-settings = [03 05 03 00 20 07 01];

		qcom,platform-lane-config = [02 00 00 00 20 00 00 01 88

			02 00 00 00 40 00 00 01 88

			02 00 00 40 20 00 00 01 88

			02 00 00 40 00 00 00 01 88

			00 00 00 80 00 00 00 01 88];



		qcom,mmss-ulp-clamp-ctrl-offset = <0x14>;

		qcom,mmss-phyreset-ctrl-offset = <0x108>;
@@ -180,6 +195,162 @@ 
			};

		};



		qcom,ctrl-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,ctrl-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda";

				qcom,supply-min-voltage = <1250000>;

				qcom,supply-max-voltage = <1250000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

			};



			qcom,ctrl-supply-entry@1 {

				reg = <1>;

				qcom,supply-name = "vddio";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

				qcom,supply-post-on-sleep = <20>;

			};



			qcom,ctrl-supply-entry@2 {

				reg = <2>;

				qcom,supply-name = "vcca";

				qcom,supply-min-voltage = <1000000>;

				qcom,supply-max-voltage = <1000000>;

				qcom,supply-enable-load = <10000>;

				qcom,supply-disable-load = <100>;

			};

		};



		qcom,panel-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,panel-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdd";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

				qcom,supply-post-on-sleep = <20>;

			};

		};

	};



	mdss_dsi1: qcom,mdss_dsi@fd996000 {

		compatible = "qcom,mdss-dsi-ctrl";

		label = "MDSS DSI CTRL->1";

		cell-index = <1>;

		reg = 	<0xfd996000 0x260>,

			<0xfd996500 0x2b0>,

			<0xfd828000 0x108>;

		reg-names = "dsi_ctrl", "dsi_phy", "mmss_misc_phys";

		gdsc-supply = <&gdsc_mdss>;

		vdd-supply = <&pm8994_l14>;

		vddio-supply = <&pm8994_l12>;

		vdda-supply = <&pm8994_l2>;

		vcca-supply = <&pm8994_l28>;

		qcom,mdss-fb-map = <&mdss_fb0>;

		qcom,mdss-mdp = <&mdss_mdp>;

		clocks = <&clock_mmss clk_mdss_mdp_clk>,

			<&clock_mmss clk_mdss_ahb_clk>,

			<&clock_mmss clk_mmss_misc_ahb_clk>,

			<&clock_mmss clk_mdss_axi_clk>,

			<&clock_mmss clk_mdss_byte1_clk>,

			<&clock_mmss clk_mdss_pclk1_clk>,

			<&clock_mmss clk_mdss_esc1_clk>,

			<&mdss_dsi0_pll clk_mdss_byte_clk_mux>,

			<&mdss_dsi0_pll clk_mdss_pixel_clk_mux>,

			<&mdss_dsi0_pll clk_byte_clk_src>,

			<&mdss_dsi0_pll clk_pixel_clk_src>,

			<&mdss_dsi1_pll clk_mdss_dsi1_vco_clk_src>;

		clock-names = "mdp_core_clk", "iface_clk",

			"core_mmss_clk", "bus_clk",

			"byte_clk", "pixel_clk", "core_clk",

			"mdss_byte_clk_mux", "mdss_pixel_clk_mux",

			"byte_clk_src", "pixel_clk_src",

			"clk_mdss_dsi1_vco_clk_src";



		qcom,platform-strength-ctrl = [77 06];

		qcom,platform-bist-ctrl = [00 00 b1 ff 00 00];

		qcom,platform-regulator-settings = [03 05 03 00 20 07 01];

		qcom,platform-lane-config = [02 00 00 00 20 00 00 01 88

			02 00 00 00 40 00 00 01 88

			02 00 00 40 20 00 00 01 88

			02 00 00 40 00 00 00 01 88

			00 00 00 80 00 00 00 01 88];



		qcom,mmss-ulp-clamp-ctrl-offset = <0x14>;

		qcom,mmss-phyreset-ctrl-offset = <0x108>;



		qcom,core-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,core-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};



		qcom,ctrl-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,ctrl-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda";

				qcom,supply-min-voltage = <1250000>;

				qcom,supply-max-voltage = <1250000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

			};



			qcom,ctrl-supply-entry@1 {

				reg = <1>;

				qcom,supply-name = "vddio";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

				qcom,supply-post-on-sleep = <20>;

			};



			qcom,ctrl-supply-entry@2 {

				reg = <2>;

				qcom,supply-name = "vcca";

				qcom,supply-min-voltage = <1000000>;

				qcom,supply-max-voltage = <1000000>;

				qcom,supply-enable-load = <10000>;

				qcom,supply-disable-load = <100>;

			};

		};



		qcom,panel-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,panel-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdd";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

				qcom,supply-post-on-sleep = <20>;

			};

		};

	};



	qcom,mdss_wb_panel {
@@ -197,13 +368,14 @@ 
		reg-names = "core_physical", "qfprom_physical";



		hpd-gdsc-supply = <&gdsc_mdss>;

		core-vdda-supply = <&pm8994_l12>;

		core-vcc-supply = <&pm8994_s4>;



		qcom,supply-names = "hpd-gdsc";



		qcom,min-voltage-level = <0>;

		qcom,max-voltage-level = <0>;

		qcom,enable-load = <0>;

		qcom,disable-load = <0>;

		qcom,supply-names = "hpd-gdsc", "core-vdda", "core-vcc";

		qcom,min-voltage-level = <0 1800000 1800000>;

		qcom,max-voltage-level = <0 1800000 1800000>;

		qcom,enable-load = <0 300000 0>;

		qcom,disable-load = <0 0 0>;



		clocks = <&clock_mmss clk_mdss_mdp_clk>,

				<&clock_mmss clk_mdss_ahb_clk>,
@@ -212,7 +384,6 @@ 
				<&clock_mmss clk_mdss_extpclk_clk>;

		clock-names = "mdp_core_clk", "iface_clk",

				"core_clk", "alt_iface_clk", "extp_clk";



		qcom,mdss-fb-map = <&mdss_fb1>;

		qcom,msm-hdmi-audio-rx {

			compatible = "qcom,msm-hdmi-audio-codec-rx";

arch/arm/boot/dts/qcom/msm8992-mtp.dtsi

+60 −0
Original line number Diff line number Diff line
@@ -12,6 +12,66 @@ 


#include "msm8992-pinctrl.dtsi"



#include "dsi-panel-sharp-dualmipi0-wqxga-video.dtsi"

#include "dsi-panel-sharp-dualmipi1-wqxga-video.dtsi"

&mdss_mdp {

	qcom,mdss-pref-prim-intf = "dsi";

};



&pmx_mdss {

	qcom,num-grp-pins = <1>;

	qcom,pins = <&gp 78>;

};



&mdss_dsi0 {

	qcom,dsi-pref-prim-pan = <&dsi_dual_sharp_video_0>;

	pinctrl-names = "mdss_default", "mdss_sleep";

	pinctrl-0 = <&mdss_dsi_active>;

	pinctrl-1 = <&mdss_dsi_suspend>;

	qcom,dsi-panel-bias-vreg;

	qcom,platform-reset-gpio = <&msm_gpio 78 0>;

	qcom,platform-enable-gpio = <&pm8994_gpios 14 0>;

};



&mdss_dsi1 {

	qcom,dsi-pref-prim-pan = <&dsi_dual_sharp_video_1>;

};

&dsi_dual_sharp_video_0 {

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <4095>;

};



&pmx_hdmi_cec {

	qcom,num-grp-pins = <1>;

	qcom,pins = <&gp 31>;

};



&pmx_hdmi_ddc {

	qcom,num-grp-pins = <2>;

	qcom,pins = <&gp 32>, <&gp 33>;

};



&pmx_hdmi_hpd {

	qcom,num-grp-pins = <1>;

	qcom,pins = <&gp 34>;

};



&mdss_hdmi_tx {

	pinctrl-names = "hdmi_hpd_active", "hdmi_ddc_active",

				"hdmi_cec_active", "hdmi_active",

				"hdmi_sleep";

	pinctrl-0 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_suspend

						&mdss_hdmi_cec_suspend>;

	pinctrl-1 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active

						&mdss_hdmi_cec_suspend>;

	pinctrl-2 = <&mdss_hdmi_hpd_active &mdss_hdmi_cec_active

						&mdss_hdmi_ddc_suspend>;

	pinctrl-3 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active

						&mdss_hdmi_cec_active>;

	pinctrl-4 = <&mdss_hdmi_hpd_suspend &mdss_hdmi_ddc_suspend

						&mdss_hdmi_cec_suspend>;

};

&blsp1_uart2 {

	status= "ok";

	pinctrl-names = "default";

arch/arm/boot/dts/qcom/msm8992-pinctrl.dtsi

+66 −0
Original line number Diff line number Diff line
@@ -66,6 +66,72 @@ 
			};

		};



		pmx_mdss: pmx_mdss {

			label = "mdss-pins";

			qcom,pin-func = <0>;

			mdss_dsi_active: active {

				drive-strength = <8>; /* 8 mA */

				bias-disable = <0>; /* no pull */

			};

			mdss_dsi_suspend: suspend {

				drive-strength = <2>; /* 2 mA */

				bias-pull-down; /* pull down */

			};

		};



		pmx_mdss_te: pmx_mdss_te {

			label = "mdss-te-pins";

			qcom,pin-func = <1>;

			mdss_te_active: active {

				drive-strength = <2>; /* 8 mA */

				bias-pull-down = <0>; /* pull down*/

				input-debounce = <0>;

			};

			mdss_te_suspend: suspend {

				drive-strength = <2>; /* 2 mA */

				bias-pull-down; /* pull down */

				input-debounce = <0>;

			};

		};



		pmx_hdmi_cec: pmx_hdmi_cec {

			qcom,pin-func = <1>;

			label = "hdmi-cec-pins";

			mdss_hdmi_cec_active: cec_active {

				drive-strength = <2>;

				bias-pull-up;

			};

			mdss_hdmi_cec_suspend: cec_suspend {

				drive-strength = <2>;

				bias-pull-down;

			};

		};



		pmx_hdmi_ddc: pmx_hdmi_ddc {

			qcom,pin-func = <1>;

			label = "hdmi-ddc-pins";

			mdss_hdmi_ddc_active: ddc_active {

				drive-strength = <2>;

				bias-pull-up;

			};

			mdss_hdmi_ddc_suspend: ddc_suspend {

				drive-strength = <2>;

				bias-pull-down;

			};

		};



		pmx_hdmi_hpd: pmx_hdmi_hpd {

			qcom,pin-func = <1>;

			label = "hdmi-hpd-pin";

			mdss_hdmi_hpd_active: hpd_active {

				drive-strength = <16>;

				bias-pull-down;

			};

			mdss_hdmi_hpd_suspend: hpd_suspend {

				drive-strength = <2>;

				bias-pull-down;

			};

		};

		/* SDC pin type */

		sdc: sdc {

			/* 0-3 for sdc1 4-6 for sdc2 */