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Commit 45a7804d authored by Rohit Vaswani's avatar Rohit Vaswani
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net: danipc: Increase mtu and fifo size for danipc



Change MTU and descriptor size from 128 to 1600 bytes to move
data more efficiently between Krait and Hex2 processors. Get the
fifo size from dt.

Change-Id: Id75f058c54b334389323dbfe199c2f406d57c282
Acked-by: default avatarXiuping Lu <xiupingl@qti.qualcomm.com>
Signed-off-by: default avatarRohit Vaswani <rvaswani@codeaurora.org>
parent 27dc99b6
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+20 −6
Original line number Diff line number Diff line
@@ -38,17 +38,30 @@ Required properties:
		location and size of QDSP6 3 IPC region
- interrupts:	IPC interrupt line

Examples:
Optional properties:
-qcom,cpu0-shm-size: size of shared memory region for CPU0
-qcom,cpu1-shm-size: size of shared memory region for CPU1
-qcom,cpu2-shm-size: size of shared memory region for CPU2
-qcom,cpu3-shm-size: size of shared memory region for CPU3
-qcom,dsp0-shm-size: size of shared memory region for DSP0
-qcom,dsp1-shm-size: size of shared memory region for DSP1
-qcom,dsp2-shm-size: size of shared memory region for DSP2
-qcom,krait-shm-size: size of shared memory region for Krait
-qcom,qdsp6-0-shm-size: size of shared memory region for QDSP6 0
-qcom,qdsp6-1-shm-size: size of shared memory region for QDSP6 1
-qcom,qdsp6-2-shm-size: size of shared memory region for QDSP6 2
-qcom,qdsp6-3-shm-size: size of shared memory region for QDSP6 3

	qcom,danipc@251f8000 {
Examples:
	qcom,danipc@24200000 {
		compatible = "qcom,danipc";
		reg-names = "ipc_bufs", "agent_table", "krait_ipc_intr_en",
				"cpu0_ipc", "cpu1_ipc", "cpu2_ipc", "cpu3_ipc",
				"dsp0_ipc", "dsp1_ipc", "dsp2_ipc", "krait_ipc",
				"qdsp6_0_ipc", "qdsp6_1_ipc", "qdsp6_2_ipc",
				"qdsp6_3_ipc";
		reg = <0x251f8000 0x8000>, /* ipc_bufs */
			<0xf601ac00 0x2000>, /* agent_table */
		reg = <0x24200000 0x80000>, /* ipc_bufs */
			<0x1cf60000 0x2000>, /* agent_table */
			<0xfd4a3500 0x100>, /* krait_ipc_intr_en */
			<0xf683a000 0x100>, /* cpu0_ipc */
			<0xf683a000 0x100>, /* cpu1_ipc */
@@ -60,7 +73,8 @@ Examples:
			<0xfd490000 0x100>, /* krait_ipc */
			<0xfd491000 0x100>, /* qdsp6_0_ipc */
			<0xfd492000 0x100>, /* qdsp6_1_ipc */
			<0xfd493000 0x100>, /* qdsp6_2_ipc */
			<0xfd496000 0x100>, /* qdsp6_2_ipc */
			<0xfd494000 0x100>; /* qdsp6_3_ipc */
		interrupts = <0 234 0>;
		qcom,qdsp6-2-shm-size = <0x4000000>;
		interrupts = <0 202 0>;
	};
+10 −0
Original line number Diff line number Diff line
@@ -80,10 +80,12 @@ static int delay_skb(struct sk_buff *skb, struct ipc_to_virt_map *map)
		spin_unlock_irqrestore(&skbs_lock, flags);

		schedule_work(&delayed_skbs_work);
		skb->dev->stats.tx_fifo_errors++;
		rc = NETDEV_TX_OK;
	} else {
		netdev_err(skb->dev, "cannot allocate struct delayed_skb\n");
		rc = NETDEV_TX_BUSY;	/* Try again sometime */
		skb->dev->stats.tx_dropped++;
	}
	return rc;
}
@@ -195,3 +197,11 @@ handle_incoming_packet(char *const packet, u8 cpu_id,
	} else
		danipc_dev->stats.rx_dropped++;
}

int danipc_change_mtu(struct net_device *dev, int new_mtu)
{
	if ((new_mtu < 68) || (new_mtu > IPC_BUF_SIZE_MAX))
		return -EINVAL;
	dev->mtu = new_mtu;
	return 0;
}
+1 −0
Original line number Diff line number Diff line
@@ -95,5 +95,6 @@ extern spinlock_t skbs_lock;
extern struct work_struct delayed_skbs_work;

extern struct net_device	*danipc_dev;
extern int danipc_change_mtu(struct net_device *dev, int new_mtu);

#endif /* __DANIPC_H__ */
+28 −11
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@
 * Vladik, 21.08.2011
 */

#define FIFO_MAP_SIZE		SZ_16K
#define FIFO_MAP_SIZE		SZ_256K
#define FIFO_MAP_MASK		(FIFO_MAP_SIZE - 1)

uint8_t	__iomem			*ipc_buffers;
@@ -99,16 +99,33 @@ static void unmap_ipc_to_virt_map(void)
static void remap_fifo_mem(const int cpuid, const unsigned prio,
				const uint32_t paddr)
{
	struct ipc_to_virt_map *const map = &ipc_to_virt_map[cpuid][prio];

	/* Round down to nearest 16kB address */
	const uint32_t		start_addr =
		((paddr + FIFO_MAP_MASK) & ~FIFO_MAP_MASK) - 2 * FIFO_MAP_SIZE;
	map->paddr		= start_addr;
	map->vaddr		= ioremap_nocache(start_addr,
							2 * FIFO_MAP_SIZE);
	struct ipc_to_virt_map *const map = ipc_to_virt_map[cpuid];
	unsigned other_prio = (prio == IPC_trns_prio_0) ?
				IPC_trns_prio_1 : IPC_trns_prio_0;
	uint32_t start_addr;
	uint32_t map_size;
	uint32_t map_mask;

	/* Use shared memory size if defined for given CPU.
	 * Since shared memory is used for both FIFO priorities, remap
	 * only once for this CPU.
	 */
	if (IPC_shared_mem_sizes[cpuid]) {
		map_size = IPC_shared_mem_sizes[cpuid];
		map_mask = map_size - 1;
		start_addr = ((paddr + map_mask) & ~map_mask) - map_size;
		map[prio].paddr = map[other_prio].paddr = start_addr;
		map[prio].vaddr = map[other_prio].vaddr =
			ioremap_nocache(start_addr, 2 * map_size);
	} else {
		map_size = FIFO_MAP_SIZE;
		map_mask = FIFO_MAP_MASK;
		start_addr = ((paddr + map_mask) & ~map_mask) - 2 * map_size;
		map[prio].paddr = start_addr;
		map[prio].vaddr = ioremap_nocache(start_addr, 2 * map_size);
	}

	if (!map->vaddr) {
	if (!map[prio].vaddr) {
		pr_err(
			"%s:%d cpuid = %d priority = %u cannot remap FIFO memory at addr. 0x%x\n",
			__func__, __LINE__, cpuid, prio, start_addr);
+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ extern uint8_t __iomem *ipc_buffers;
extern uint32_t				IPC_array_hw_access_phys[];
extern unsigned				IPC_hw_access_phys_len[];
extern void __iomem			*IPC_array_hw_access[];
extern uint32_t				IPC_shared_mem_sizes[];
extern struct agentNameEntry __iomem	*agentTable;

#define PLATFORM_my_ipc_id	/*CHIP_IPC_KRAIT_ADDR*/ 8
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