Loading sound/soc/codecs/msm8x16-wcd.c +2 −2 Original line number Diff line number Diff line Loading @@ -206,7 +206,7 @@ static int get_spmi_msm8x16_wcd_device_info(u16 *reg, static int msm8x16_wcd_ahb_write_device(u16 reg, u8 *value, u32 bytes) { u32 temp = ((u32)(*value)) & 0x000000FF; u32 offset = (((u32)(reg)) ^ 0x00000400) & 0x00000FFF; u32 offset = (((u32)(reg)) ^ 0x00000200) & 0x00000FFF; bool q6_state = false; q6_state = q6core_is_adsp_ready(); Loading @@ -224,7 +224,7 @@ static int msm8x16_wcd_ahb_write_device(u16 reg, u8 *value, u32 bytes) static int msm8x16_wcd_ahb_read_device(u16 reg, u32 bytes, u8 *value) { u32 temp; u32 offset = (((u32)(reg)) ^ 0x00000400) & 0x00000FFF; u32 offset = (((u32)(reg)) ^ 0x00000200) & 0x00000FFF; bool q6_state = false; q6_state = q6core_is_adsp_ready(); Loading sound/soc/codecs/msm8x16-wcd.h +1 −1 Original line number Diff line number Diff line Loading @@ -35,7 +35,7 @@ #define MSM8X16_CODEC_NAME "msm8x16_wcd_codec" #define MSM8X16_WCD_IS_DIGITAL_REG(reg) \ (((reg >= 0x400) && (reg <= 0x6FF)) ? 1 : 0) (((reg >= 0x200) && (reg <= 0x4FF)) ? 1 : 0) #define MSM8X16_WCD_IS_TOMBAK_REG(reg) \ (((reg >= 0x000) && (reg <= 0x1FF)) ? 1 : 0) extern const u8 msm8x16_wcd_reg_readable[MSM8X16_WCD_CACHE_SIZE]; Loading sound/soc/codecs/msm8x16_wcd_registers.h +97 −97 Original line number Diff line number Diff line Loading @@ -320,198 +320,198 @@ #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL4 (0x1F4) #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL4__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_RX_RESET_CTL (0x400) #define MSM8X16_WCD_A_CDC_CLK_RX_RESET_CTL (0x200) #define MSM8X16_WCD_A_CDC_CLK_RX_RESET_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_TX_RESET_B1_CTL (0x404) #define MSM8X16_WCD_A_CDC_CLK_TX_RESET_B1_CTL (0x204) #define MSM8X16_WCD_A_CDC_CLK_TX_RESET_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_DMIC_B1_CTL (0x408) #define MSM8X16_WCD_A_CDC_CLK_DMIC_B1_CTL (0x208) #define MSM8X16_WCD_A_CDC_CLK_DMIC_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_RX_I2S_CTL (0x40C) #define MSM8X16_WCD_A_CDC_CLK_RX_I2S_CTL (0x20C) #define MSM8X16_WCD_A_CDC_CLK_RX_I2S_CTL__POR (0x13) #define MSM8X16_WCD_A_CDC_CLK_TX_I2S_CTL (0x410) #define MSM8X16_WCD_A_CDC_CLK_TX_I2S_CTL (0x210) #define MSM8X16_WCD_A_CDC_CLK_TX_I2S_CTL__POR (0x13) #define MSM8X16_WCD_A_CDC_CLK_OTHR_RESET_B1_CTL (0x414) #define MSM8X16_WCD_A_CDC_CLK_OTHR_RESET_B1_CTL (0x214) #define MSM8X16_WCD_A_CDC_CLK_OTHR_RESET_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x418) #define MSM8X16_WCD_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x218) #define MSM8X16_WCD_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_OTHR_CTL (0x41C) #define MSM8X16_WCD_A_CDC_CLK_OTHR_CTL (0x21C) #define MSM8X16_WCD_A_CDC_CLK_OTHR_CTL__POR (0x04) #define MSM8X16_WCD_A_CDC_CLK_RX_B1_CTL (0x420) #define MSM8X16_WCD_A_CDC_CLK_RX_B1_CTL (0x220) #define MSM8X16_WCD_A_CDC_CLK_RX_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_MCLK_CTL (0x424) #define MSM8X16_WCD_A_CDC_CLK_MCLK_CTL (0x224) #define MSM8X16_WCD_A_CDC_CLK_MCLK_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_PDM_CTL (0x428) #define MSM8X16_WCD_A_CDC_CLK_PDM_CTL (0x228) #define MSM8X16_WCD_A_CDC_CLK_PDM_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_SD_CTL (0x42C) #define MSM8X16_WCD_A_CDC_CLK_SD_CTL (0x22C) #define MSM8X16_WCD_A_CDC_CLK_SD_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B1_CTL (0x440) #define MSM8X16_WCD_A_CDC_RX1_B1_CTL (0x240) #define MSM8X16_WCD_A_CDC_RX1_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B1_CTL (0x460) #define MSM8X16_WCD_A_CDC_RX2_B1_CTL (0x260) #define MSM8X16_WCD_A_CDC_RX2_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B1_CTL (0x480) #define MSM8X16_WCD_A_CDC_RX3_B1_CTL (0x280) #define MSM8X16_WCD_A_CDC_RX3_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B2_CTL (0x444) #define MSM8X16_WCD_A_CDC_RX1_B2_CTL (0x244) #define MSM8X16_WCD_A_CDC_RX1_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B2_CTL (0x464) #define MSM8X16_WCD_A_CDC_RX2_B2_CTL (0x264) #define MSM8X16_WCD_A_CDC_RX2_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B2_CTL (0x484) #define MSM8X16_WCD_A_CDC_RX3_B2_CTL (0x284) #define MSM8X16_WCD_A_CDC_RX3_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B3_CTL (0x448) #define MSM8X16_WCD_A_CDC_RX1_B3_CTL (0x248) #define MSM8X16_WCD_A_CDC_RX1_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B3_CTL (0x468) #define MSM8X16_WCD_A_CDC_RX2_B3_CTL (0x268) #define MSM8X16_WCD_A_CDC_RX2_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B3_CTL (0x488) #define MSM8X16_WCD_A_CDC_RX3_B3_CTL (0x288) #define MSM8X16_WCD_A_CDC_RX3_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B4_CTL (0x44C) #define MSM8X16_WCD_A_CDC_RX1_B4_CTL (0x24C) #define MSM8X16_WCD_A_CDC_RX1_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B4_CTL (0x46C) #define MSM8X16_WCD_A_CDC_RX2_B4_CTL (0x26C) #define MSM8X16_WCD_A_CDC_RX2_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B4_CTL (0x48C) #define MSM8X16_WCD_A_CDC_RX3_B4_CTL (0x28C) #define MSM8X16_WCD_A_CDC_RX3_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B5_CTL (0x450) #define MSM8X16_WCD_A_CDC_RX1_B5_CTL (0x250) #define MSM8X16_WCD_A_CDC_RX1_B5_CTL__POR (0x68) #define MSM8X16_WCD_A_CDC_RX2_B5_CTL (0x470) #define MSM8X16_WCD_A_CDC_RX2_B5_CTL (0x270) #define MSM8X16_WCD_A_CDC_RX2_B5_CTL__POR (0x68) #define MSM8X16_WCD_A_CDC_RX3_B5_CTL (0x490) #define MSM8X16_WCD_A_CDC_RX3_B5_CTL (0x290) #define MSM8X16_WCD_A_CDC_RX3_B5_CTL__POR (0x68) #define MSM8X16_WCD_A_CDC_RX1_B6_CTL (0x454) #define MSM8X16_WCD_A_CDC_RX1_B6_CTL (0x254) #define MSM8X16_WCD_A_CDC_RX1_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B6_CTL (0x474) #define MSM8X16_WCD_A_CDC_RX2_B6_CTL (0x274) #define MSM8X16_WCD_A_CDC_RX2_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B6_CTL (0x494) #define MSM8X16_WCD_A_CDC_RX3_B6_CTL (0x294) #define MSM8X16_WCD_A_CDC_RX3_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B1_CTL (0x458) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B1_CTL (0x258) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B1_CTL (0x478) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B1_CTL (0x278) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B1_CTL (0x498) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B1_CTL (0x298) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B2_CTL (0x45C) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B2_CTL (0x25C) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B2_CTL (0x47C) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B2_CTL (0x27C) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B2_CTL (0x49C) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B2_CTL (0x29C) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TOP_GAIN_UPDATE (0x4A0) #define MSM8X16_WCD_A_CDC_TOP_GAIN_UPDATE (0x2A0) #define MSM8X16_WCD_A_CDC_TOP_GAIN_UPDATE__POR (0x00) #define MSM8X16_WCD_A_CDC_TOP_CTL (0x4A4) #define MSM8X16_WCD_A_CDC_TOP_CTL (0x2A4) #define MSM8X16_WCD_A_CDC_TOP_CTL__POR (0x01) #define MSM8X16_WCD_A_CDC_DEBUG_DESER1_CTL (0x4E0) #define MSM8X16_WCD_A_CDC_DEBUG_DESER1_CTL (0x2E0) #define MSM8X16_WCD_A_CDC_DEBUG_DESER1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_DEBUG_DESER2_CTL (0x4E4) #define MSM8X16_WCD_A_CDC_DEBUG_DESER2_CTL (0x2E4) #define MSM8X16_WCD_A_CDC_DEBUG_DESER2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_DEBUG_B1_CTL_CFG (0x4E8) #define MSM8X16_WCD_A_CDC_DEBUG_B1_CTL_CFG (0x2E8) #define MSM8X16_WCD_A_CDC_DEBUG_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_DEBUG_B2_CTL_CFG (0x4EC) #define MSM8X16_WCD_A_CDC_DEBUG_B2_CTL_CFG (0x2EC) #define MSM8X16_WCD_A_CDC_DEBUG_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_DEBUG_B3_CTL_CFG (0x4F0) #define MSM8X16_WCD_A_CDC_DEBUG_B3_CTL_CFG (0x2F0) #define MSM8X16_WCD_A_CDC_DEBUG_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B1_CTL (0x500) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B1_CTL (0x300) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B1_CTL (0x540) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B1_CTL (0x340) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B2_CTL (0x504) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B2_CTL (0x304) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B2_CTL (0x544) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B2_CTL (0x344) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B3_CTL (0x508) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B3_CTL (0x308) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B3_CTL (0x548) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B3_CTL (0x348) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B4_CTL (0x50C) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B4_CTL (0x30C) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B4_CTL (0x54C) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B4_CTL (0x34C) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B5_CTL (0x510) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B5_CTL (0x310) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B5_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B5_CTL (0x550) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B5_CTL (0x350) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B5_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B6_CTL (0x514) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B6_CTL (0x314) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B6_CTL (0x554) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B6_CTL (0x354) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B7_CTL (0x518) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B7_CTL (0x318) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B7_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B7_CTL (0x558) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B7_CTL (0x358) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B7_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B8_CTL (0x51C) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B8_CTL (0x31C) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B8_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B8_CTL (0x55C) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B8_CTL (0x35C) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B8_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_CTL (0x520) #define MSM8X16_WCD_A_CDC_IIR1_CTL (0x320) #define MSM8X16_WCD_A_CDC_IIR1_CTL__POR (0x40) #define MSM8X16_WCD_A_CDC_IIR2_CTL (0x560) #define MSM8X16_WCD_A_CDC_IIR2_CTL (0x360) #define MSM8X16_WCD_A_CDC_IIR2_CTL__POR (0x40) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_TIMER_CTL (0x524) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_TIMER_CTL (0x324) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_TIMER_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_TIMER_CTL (0x564) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_TIMER_CTL (0x364) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_TIMER_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL (0x528) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL (0x328) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL (0x568) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL (0x368) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B2_CTL (0x52C) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B2_CTL (0x32C) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B2_CTL (0x56C) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B2_CTL (0x36C) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX1_B1_CTL (0x580) #define MSM8X16_WCD_A_CDC_CONN_RX1_B1_CTL (0x380) #define MSM8X16_WCD_A_CDC_CONN_RX1_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX1_B2_CTL (0x584) #define MSM8X16_WCD_A_CDC_CONN_RX1_B2_CTL (0x384) #define MSM8X16_WCD_A_CDC_CONN_RX1_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX1_B3_CTL (0x588) #define MSM8X16_WCD_A_CDC_CONN_RX1_B3_CTL (0x388) #define MSM8X16_WCD_A_CDC_CONN_RX1_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX2_B1_CTL (0x58C) #define MSM8X16_WCD_A_CDC_CONN_RX2_B1_CTL (0x38C) #define MSM8X16_WCD_A_CDC_CONN_RX2_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX2_B2_CTL (0x590) #define MSM8X16_WCD_A_CDC_CONN_RX2_B2_CTL (0x390) #define MSM8X16_WCD_A_CDC_CONN_RX2_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX2_B3_CTL (0x594) #define MSM8X16_WCD_A_CDC_CONN_RX2_B3_CTL (0x394) #define MSM8X16_WCD_A_CDC_CONN_RX2_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX3_B1_CTL (0x598) #define MSM8X16_WCD_A_CDC_CONN_RX3_B1_CTL (0x398) #define MSM8X16_WCD_A_CDC_CONN_RX3_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX3_B2_CTL (0x59C) #define MSM8X16_WCD_A_CDC_CONN_RX3_B2_CTL (0x39C) #define MSM8X16_WCD_A_CDC_CONN_RX3_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_TX_B1_CTL (0x5A0) #define MSM8X16_WCD_A_CDC_CONN_TX_B1_CTL (0x3A0) #define MSM8X16_WCD_A_CDC_CONN_TX_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B1_CTL (0x5A8) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B1_CTL (0x3A8) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B2_CTL (0x5AC) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B2_CTL (0x3AC) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B3_CTL (0x5B0) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B3_CTL (0x3B0) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B4_CTL (0x5B4) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B4_CTL (0x3B4) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B1_CTL (0x5B8) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B1_CTL (0x3B8) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B2_CTL (0x5BC) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B2_CTL (0x3BC) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B3_CTL (0x5C0) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B3_CTL (0x3C0) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B4_CTL (0x5C4) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B4_CTL (0x3C4) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_TX_I2S_SD1_CTL (0x5C8) #define MSM8X16_WCD_A_CDC_CONN_TX_I2S_SD1_CTL (0x3C8) #define MSM8X16_WCD_A_CDC_CONN_TX_I2S_SD1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_TIMER (0x680) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_TIMER (0x480) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_TIMER__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_TIMER (0x6A0) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_TIMER (0x4A0) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_TIMER__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_GAIN (0x684) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_GAIN (0x484) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_GAIN__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_GAIN (0x6A4) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_GAIN (0x4A4) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_GAIN__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_CFG (0x688) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_CFG (0x488) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_CFG__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG (0x6A8) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG (0x4A8) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_MUX_CTL (0x68C) #define MSM8X16_WCD_A_CDC_TX1_MUX_CTL (0x48C) #define MSM8X16_WCD_A_CDC_TX1_MUX_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_MUX_CTL (0x6AC) #define MSM8X16_WCD_A_CDC_TX2_MUX_CTL (0x4AC) #define MSM8X16_WCD_A_CDC_TX2_MUX_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_CLK_FS_CTL (0x690) #define MSM8X16_WCD_A_CDC_TX1_CLK_FS_CTL (0x490) #define MSM8X16_WCD_A_CDC_TX1_CLK_FS_CTL__POR (0x03) #define MSM8X16_WCD_A_CDC_TX2_CLK_FS_CTL (0x6B0) #define MSM8X16_WCD_A_CDC_TX2_CLK_FS_CTL (0x4B0) #define MSM8X16_WCD_A_CDC_TX2_CLK_FS_CTL__POR (0x03) #define MSM8X16_WCD_A_CDC_TX1_DMIC_CTL (0x694) #define MSM8X16_WCD_A_CDC_TX1_DMIC_CTL (0x494) #define MSM8X16_WCD_A_CDC_TX1_DMIC_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_DMIC_CTL (0x6B4) #define MSM8X16_WCD_A_CDC_TX2_DMIC_CTL (0x4B4) #define MSM8X16_WCD_A_CDC_TX2_DMIC_CTL__POR (0x00) #endif Loading
sound/soc/codecs/msm8x16-wcd.c +2 −2 Original line number Diff line number Diff line Loading @@ -206,7 +206,7 @@ static int get_spmi_msm8x16_wcd_device_info(u16 *reg, static int msm8x16_wcd_ahb_write_device(u16 reg, u8 *value, u32 bytes) { u32 temp = ((u32)(*value)) & 0x000000FF; u32 offset = (((u32)(reg)) ^ 0x00000400) & 0x00000FFF; u32 offset = (((u32)(reg)) ^ 0x00000200) & 0x00000FFF; bool q6_state = false; q6_state = q6core_is_adsp_ready(); Loading @@ -224,7 +224,7 @@ static int msm8x16_wcd_ahb_write_device(u16 reg, u8 *value, u32 bytes) static int msm8x16_wcd_ahb_read_device(u16 reg, u32 bytes, u8 *value) { u32 temp; u32 offset = (((u32)(reg)) ^ 0x00000400) & 0x00000FFF; u32 offset = (((u32)(reg)) ^ 0x00000200) & 0x00000FFF; bool q6_state = false; q6_state = q6core_is_adsp_ready(); Loading
sound/soc/codecs/msm8x16-wcd.h +1 −1 Original line number Diff line number Diff line Loading @@ -35,7 +35,7 @@ #define MSM8X16_CODEC_NAME "msm8x16_wcd_codec" #define MSM8X16_WCD_IS_DIGITAL_REG(reg) \ (((reg >= 0x400) && (reg <= 0x6FF)) ? 1 : 0) (((reg >= 0x200) && (reg <= 0x4FF)) ? 1 : 0) #define MSM8X16_WCD_IS_TOMBAK_REG(reg) \ (((reg >= 0x000) && (reg <= 0x1FF)) ? 1 : 0) extern const u8 msm8x16_wcd_reg_readable[MSM8X16_WCD_CACHE_SIZE]; Loading
sound/soc/codecs/msm8x16_wcd_registers.h +97 −97 Original line number Diff line number Diff line Loading @@ -320,198 +320,198 @@ #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL4 (0x1F4) #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL4__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_RX_RESET_CTL (0x400) #define MSM8X16_WCD_A_CDC_CLK_RX_RESET_CTL (0x200) #define MSM8X16_WCD_A_CDC_CLK_RX_RESET_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_TX_RESET_B1_CTL (0x404) #define MSM8X16_WCD_A_CDC_CLK_TX_RESET_B1_CTL (0x204) #define MSM8X16_WCD_A_CDC_CLK_TX_RESET_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_DMIC_B1_CTL (0x408) #define MSM8X16_WCD_A_CDC_CLK_DMIC_B1_CTL (0x208) #define MSM8X16_WCD_A_CDC_CLK_DMIC_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_RX_I2S_CTL (0x40C) #define MSM8X16_WCD_A_CDC_CLK_RX_I2S_CTL (0x20C) #define MSM8X16_WCD_A_CDC_CLK_RX_I2S_CTL__POR (0x13) #define MSM8X16_WCD_A_CDC_CLK_TX_I2S_CTL (0x410) #define MSM8X16_WCD_A_CDC_CLK_TX_I2S_CTL (0x210) #define MSM8X16_WCD_A_CDC_CLK_TX_I2S_CTL__POR (0x13) #define MSM8X16_WCD_A_CDC_CLK_OTHR_RESET_B1_CTL (0x414) #define MSM8X16_WCD_A_CDC_CLK_OTHR_RESET_B1_CTL (0x214) #define MSM8X16_WCD_A_CDC_CLK_OTHR_RESET_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x418) #define MSM8X16_WCD_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x218) #define MSM8X16_WCD_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_OTHR_CTL (0x41C) #define MSM8X16_WCD_A_CDC_CLK_OTHR_CTL (0x21C) #define MSM8X16_WCD_A_CDC_CLK_OTHR_CTL__POR (0x04) #define MSM8X16_WCD_A_CDC_CLK_RX_B1_CTL (0x420) #define MSM8X16_WCD_A_CDC_CLK_RX_B1_CTL (0x220) #define MSM8X16_WCD_A_CDC_CLK_RX_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_MCLK_CTL (0x424) #define MSM8X16_WCD_A_CDC_CLK_MCLK_CTL (0x224) #define MSM8X16_WCD_A_CDC_CLK_MCLK_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_PDM_CTL (0x428) #define MSM8X16_WCD_A_CDC_CLK_PDM_CTL (0x228) #define MSM8X16_WCD_A_CDC_CLK_PDM_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CLK_SD_CTL (0x42C) #define MSM8X16_WCD_A_CDC_CLK_SD_CTL (0x22C) #define MSM8X16_WCD_A_CDC_CLK_SD_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B1_CTL (0x440) #define MSM8X16_WCD_A_CDC_RX1_B1_CTL (0x240) #define MSM8X16_WCD_A_CDC_RX1_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B1_CTL (0x460) #define MSM8X16_WCD_A_CDC_RX2_B1_CTL (0x260) #define MSM8X16_WCD_A_CDC_RX2_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B1_CTL (0x480) #define MSM8X16_WCD_A_CDC_RX3_B1_CTL (0x280) #define MSM8X16_WCD_A_CDC_RX3_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B2_CTL (0x444) #define MSM8X16_WCD_A_CDC_RX1_B2_CTL (0x244) #define MSM8X16_WCD_A_CDC_RX1_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B2_CTL (0x464) #define MSM8X16_WCD_A_CDC_RX2_B2_CTL (0x264) #define MSM8X16_WCD_A_CDC_RX2_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B2_CTL (0x484) #define MSM8X16_WCD_A_CDC_RX3_B2_CTL (0x284) #define MSM8X16_WCD_A_CDC_RX3_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B3_CTL (0x448) #define MSM8X16_WCD_A_CDC_RX1_B3_CTL (0x248) #define MSM8X16_WCD_A_CDC_RX1_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B3_CTL (0x468) #define MSM8X16_WCD_A_CDC_RX2_B3_CTL (0x268) #define MSM8X16_WCD_A_CDC_RX2_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B3_CTL (0x488) #define MSM8X16_WCD_A_CDC_RX3_B3_CTL (0x288) #define MSM8X16_WCD_A_CDC_RX3_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B4_CTL (0x44C) #define MSM8X16_WCD_A_CDC_RX1_B4_CTL (0x24C) #define MSM8X16_WCD_A_CDC_RX1_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B4_CTL (0x46C) #define MSM8X16_WCD_A_CDC_RX2_B4_CTL (0x26C) #define MSM8X16_WCD_A_CDC_RX2_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B4_CTL (0x48C) #define MSM8X16_WCD_A_CDC_RX3_B4_CTL (0x28C) #define MSM8X16_WCD_A_CDC_RX3_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_B5_CTL (0x450) #define MSM8X16_WCD_A_CDC_RX1_B5_CTL (0x250) #define MSM8X16_WCD_A_CDC_RX1_B5_CTL__POR (0x68) #define MSM8X16_WCD_A_CDC_RX2_B5_CTL (0x470) #define MSM8X16_WCD_A_CDC_RX2_B5_CTL (0x270) #define MSM8X16_WCD_A_CDC_RX2_B5_CTL__POR (0x68) #define MSM8X16_WCD_A_CDC_RX3_B5_CTL (0x490) #define MSM8X16_WCD_A_CDC_RX3_B5_CTL (0x290) #define MSM8X16_WCD_A_CDC_RX3_B5_CTL__POR (0x68) #define MSM8X16_WCD_A_CDC_RX1_B6_CTL (0x454) #define MSM8X16_WCD_A_CDC_RX1_B6_CTL (0x254) #define MSM8X16_WCD_A_CDC_RX1_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_B6_CTL (0x474) #define MSM8X16_WCD_A_CDC_RX2_B6_CTL (0x274) #define MSM8X16_WCD_A_CDC_RX2_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_B6_CTL (0x494) #define MSM8X16_WCD_A_CDC_RX3_B6_CTL (0x294) #define MSM8X16_WCD_A_CDC_RX3_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B1_CTL (0x458) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B1_CTL (0x258) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B1_CTL (0x478) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B1_CTL (0x278) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B1_CTL (0x498) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B1_CTL (0x298) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B2_CTL (0x45C) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B2_CTL (0x25C) #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B2_CTL (0x47C) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B2_CTL (0x27C) #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B2_CTL (0x49C) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B2_CTL (0x29C) #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TOP_GAIN_UPDATE (0x4A0) #define MSM8X16_WCD_A_CDC_TOP_GAIN_UPDATE (0x2A0) #define MSM8X16_WCD_A_CDC_TOP_GAIN_UPDATE__POR (0x00) #define MSM8X16_WCD_A_CDC_TOP_CTL (0x4A4) #define MSM8X16_WCD_A_CDC_TOP_CTL (0x2A4) #define MSM8X16_WCD_A_CDC_TOP_CTL__POR (0x01) #define MSM8X16_WCD_A_CDC_DEBUG_DESER1_CTL (0x4E0) #define MSM8X16_WCD_A_CDC_DEBUG_DESER1_CTL (0x2E0) #define MSM8X16_WCD_A_CDC_DEBUG_DESER1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_DEBUG_DESER2_CTL (0x4E4) #define MSM8X16_WCD_A_CDC_DEBUG_DESER2_CTL (0x2E4) #define MSM8X16_WCD_A_CDC_DEBUG_DESER2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_DEBUG_B1_CTL_CFG (0x4E8) #define MSM8X16_WCD_A_CDC_DEBUG_B1_CTL_CFG (0x2E8) #define MSM8X16_WCD_A_CDC_DEBUG_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_DEBUG_B2_CTL_CFG (0x4EC) #define MSM8X16_WCD_A_CDC_DEBUG_B2_CTL_CFG (0x2EC) #define MSM8X16_WCD_A_CDC_DEBUG_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_DEBUG_B3_CTL_CFG (0x4F0) #define MSM8X16_WCD_A_CDC_DEBUG_B3_CTL_CFG (0x2F0) #define MSM8X16_WCD_A_CDC_DEBUG_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B1_CTL (0x500) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B1_CTL (0x300) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B1_CTL (0x540) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B1_CTL (0x340) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B2_CTL (0x504) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B2_CTL (0x304) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B2_CTL (0x544) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B2_CTL (0x344) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B3_CTL (0x508) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B3_CTL (0x308) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B3_CTL (0x548) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B3_CTL (0x348) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B4_CTL (0x50C) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B4_CTL (0x30C) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B4_CTL (0x54C) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B4_CTL (0x34C) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B5_CTL (0x510) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B5_CTL (0x310) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B5_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B5_CTL (0x550) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B5_CTL (0x350) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B5_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B6_CTL (0x514) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B6_CTL (0x314) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B6_CTL (0x554) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B6_CTL (0x354) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B6_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B7_CTL (0x518) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B7_CTL (0x318) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B7_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B7_CTL (0x558) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B7_CTL (0x358) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B7_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B8_CTL (0x51C) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B8_CTL (0x31C) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B8_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B8_CTL (0x55C) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B8_CTL (0x35C) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B8_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_CTL (0x520) #define MSM8X16_WCD_A_CDC_IIR1_CTL (0x320) #define MSM8X16_WCD_A_CDC_IIR1_CTL__POR (0x40) #define MSM8X16_WCD_A_CDC_IIR2_CTL (0x560) #define MSM8X16_WCD_A_CDC_IIR2_CTL (0x360) #define MSM8X16_WCD_A_CDC_IIR2_CTL__POR (0x40) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_TIMER_CTL (0x524) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_TIMER_CTL (0x324) #define MSM8X16_WCD_A_CDC_IIR1_GAIN_TIMER_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_TIMER_CTL (0x564) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_TIMER_CTL (0x364) #define MSM8X16_WCD_A_CDC_IIR2_GAIN_TIMER_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL (0x528) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL (0x328) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL (0x568) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL (0x368) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B2_CTL (0x52C) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B2_CTL (0x32C) #define MSM8X16_WCD_A_CDC_IIR1_COEF_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B2_CTL (0x56C) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B2_CTL (0x36C) #define MSM8X16_WCD_A_CDC_IIR2_COEF_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX1_B1_CTL (0x580) #define MSM8X16_WCD_A_CDC_CONN_RX1_B1_CTL (0x380) #define MSM8X16_WCD_A_CDC_CONN_RX1_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX1_B2_CTL (0x584) #define MSM8X16_WCD_A_CDC_CONN_RX1_B2_CTL (0x384) #define MSM8X16_WCD_A_CDC_CONN_RX1_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX1_B3_CTL (0x588) #define MSM8X16_WCD_A_CDC_CONN_RX1_B3_CTL (0x388) #define MSM8X16_WCD_A_CDC_CONN_RX1_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX2_B1_CTL (0x58C) #define MSM8X16_WCD_A_CDC_CONN_RX2_B1_CTL (0x38C) #define MSM8X16_WCD_A_CDC_CONN_RX2_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX2_B2_CTL (0x590) #define MSM8X16_WCD_A_CDC_CONN_RX2_B2_CTL (0x390) #define MSM8X16_WCD_A_CDC_CONN_RX2_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX2_B3_CTL (0x594) #define MSM8X16_WCD_A_CDC_CONN_RX2_B3_CTL (0x394) #define MSM8X16_WCD_A_CDC_CONN_RX2_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX3_B1_CTL (0x598) #define MSM8X16_WCD_A_CDC_CONN_RX3_B1_CTL (0x398) #define MSM8X16_WCD_A_CDC_CONN_RX3_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_RX3_B2_CTL (0x59C) #define MSM8X16_WCD_A_CDC_CONN_RX3_B2_CTL (0x39C) #define MSM8X16_WCD_A_CDC_CONN_RX3_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_TX_B1_CTL (0x5A0) #define MSM8X16_WCD_A_CDC_CONN_TX_B1_CTL (0x3A0) #define MSM8X16_WCD_A_CDC_CONN_TX_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B1_CTL (0x5A8) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B1_CTL (0x3A8) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B2_CTL (0x5AC) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B2_CTL (0x3AC) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B3_CTL (0x5B0) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B3_CTL (0x3B0) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B4_CTL (0x5B4) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B4_CTL (0x3B4) #define MSM8X16_WCD_A_CDC_CONN_EQ1_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B1_CTL (0x5B8) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B1_CTL (0x3B8) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B2_CTL (0x5BC) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B2_CTL (0x3BC) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B2_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B3_CTL (0x5C0) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B3_CTL (0x3C0) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B3_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B4_CTL (0x5C4) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B4_CTL (0x3C4) #define MSM8X16_WCD_A_CDC_CONN_EQ2_B4_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_CONN_TX_I2S_SD1_CTL (0x5C8) #define MSM8X16_WCD_A_CDC_CONN_TX_I2S_SD1_CTL (0x3C8) #define MSM8X16_WCD_A_CDC_CONN_TX_I2S_SD1_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_TIMER (0x680) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_TIMER (0x480) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_TIMER__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_TIMER (0x6A0) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_TIMER (0x4A0) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_TIMER__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_GAIN (0x684) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_GAIN (0x484) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_GAIN__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_GAIN (0x6A4) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_GAIN (0x4A4) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_GAIN__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_CFG (0x688) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_CFG (0x488) #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_CFG__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG (0x6A8) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG (0x4A8) #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_MUX_CTL (0x68C) #define MSM8X16_WCD_A_CDC_TX1_MUX_CTL (0x48C) #define MSM8X16_WCD_A_CDC_TX1_MUX_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_MUX_CTL (0x6AC) #define MSM8X16_WCD_A_CDC_TX2_MUX_CTL (0x4AC) #define MSM8X16_WCD_A_CDC_TX2_MUX_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TX1_CLK_FS_CTL (0x690) #define MSM8X16_WCD_A_CDC_TX1_CLK_FS_CTL (0x490) #define MSM8X16_WCD_A_CDC_TX1_CLK_FS_CTL__POR (0x03) #define MSM8X16_WCD_A_CDC_TX2_CLK_FS_CTL (0x6B0) #define MSM8X16_WCD_A_CDC_TX2_CLK_FS_CTL (0x4B0) #define MSM8X16_WCD_A_CDC_TX2_CLK_FS_CTL__POR (0x03) #define MSM8X16_WCD_A_CDC_TX1_DMIC_CTL (0x694) #define MSM8X16_WCD_A_CDC_TX1_DMIC_CTL (0x494) #define MSM8X16_WCD_A_CDC_TX1_DMIC_CTL__POR (0x00) #define MSM8X16_WCD_A_CDC_TX2_DMIC_CTL (0x6B4) #define MSM8X16_WCD_A_CDC_TX2_DMIC_CTL (0x4B4) #define MSM8X16_WCD_A_CDC_TX2_DMIC_CTL__POR (0x00) #endif
