Loading arch/arm/boot/dts/qcom/msm8992.dtsi +109 −0 Original line number Diff line number Diff line Loading @@ -524,6 +524,115 @@ #clock-cells = <1>; }; cci_cache: qcom,cci { compatible = "devfreq-simple-dev"; clock-names = "devfreq_clk"; clocks = <&clock_cpu clk_cci_clk>; governor = "cpufreq"; freq-tbl-khz = < 134400 >, < 300000 >, < 384000 >, < 556800 >, < 600000 >, < 729600 >, < 787200 >; }; cpubw: qcom,cpubw { compatible = "qcom,devbw"; governor = "cpufreq"; qcom,src-dst-ports = <1 512>; qcom,active-only; qcom,bw-tbl = < 1525 /* 200 MHz */ >, < 2288 /* 300 MHz */ >, < 3509 /* 460 MHz */ >, < 4173 /* 547 MHz */ >, < 5271 /* 691 MHz */ >, < 5928 /* 777 MHz */ >, < 7102 /* 931 MHz */ >; }; qcom,cpu-bwmon { compatible = "qcom,bimc-bwmon"; reg = <0xfc388000 0x300>, <0xfc381000 0x200>; reg-names = "base", "global_base"; interrupts = <0 183 4>; qcom,mport = <0>; qcom,target-dev = <&cpubw>; }; mincpubw: qcom,mincpubw { compatible = "qcom,devbw"; governor = "powersave"; qcom,src-dst-ports = <1 512>; qcom,active-only; qcom,bw-tbl = < 1525 /* 200 MHz */ >, < 2288 /* 300 MHz */ >, < 3509 /* 460 MHz */ >, < 4173 /* 547 MHz */ >, < 5271 /* 691 MHz */ >, < 5928 /* 777 MHz */ >, < 7102 /* 931 MHz */ >; }; devfreq_cpufreq: devfreq-cpufreq { cpubw-cpufreq { target-dev = <&cpubw>; cpu-to-dev-map-0 = < 600000 1525 >, < 672000 2288 >, < 787200 3509 >, < 864000 4173 >, < 960000 5271 >, < 1248000 7102 >; cpu-to-dev-map-4 = < 384000 1525 >, < 633600 2288 >, < 768000 3509 >, < 864000 4173 >, < 960000 5271 >, < 1344000 5928 >, < 1824000 7102 >; }; mincpubw-cpufreq { target-dev = <&mincpubw>; cpu-to-dev-map-0 = < 300000 1525 >, < 460800 2288 >, < 600000 3509 >, < 672000 4173 >, < 1248000 5271 >; cpu-to-dev-map-4 = < 300000 1525 >, < 480000 2288 >, < 633600 3509 >, < 768000 4173 >, < 1824000 5271 >; }; cci-cpufreq { target-dev = <&cci_cache>; cpu-to-dev-map-0 = < 384000 134400 >, < 600000 300000 >, < 787200 384000 >, < 864000 556800 >, < 960000 729600 >, < 1248000 787200 >; cpu-to-dev-map-4 = < 480000 300000 >, < 633600 384000 >, < 768000 556800 >, < 960000 600000 >, < 1440000 729600 >, < 1824000 787200 >; }; }; msm_cpufreq: qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", Loading Loading
arch/arm/boot/dts/qcom/msm8992.dtsi +109 −0 Original line number Diff line number Diff line Loading @@ -524,6 +524,115 @@ #clock-cells = <1>; }; cci_cache: qcom,cci { compatible = "devfreq-simple-dev"; clock-names = "devfreq_clk"; clocks = <&clock_cpu clk_cci_clk>; governor = "cpufreq"; freq-tbl-khz = < 134400 >, < 300000 >, < 384000 >, < 556800 >, < 600000 >, < 729600 >, < 787200 >; }; cpubw: qcom,cpubw { compatible = "qcom,devbw"; governor = "cpufreq"; qcom,src-dst-ports = <1 512>; qcom,active-only; qcom,bw-tbl = < 1525 /* 200 MHz */ >, < 2288 /* 300 MHz */ >, < 3509 /* 460 MHz */ >, < 4173 /* 547 MHz */ >, < 5271 /* 691 MHz */ >, < 5928 /* 777 MHz */ >, < 7102 /* 931 MHz */ >; }; qcom,cpu-bwmon { compatible = "qcom,bimc-bwmon"; reg = <0xfc388000 0x300>, <0xfc381000 0x200>; reg-names = "base", "global_base"; interrupts = <0 183 4>; qcom,mport = <0>; qcom,target-dev = <&cpubw>; }; mincpubw: qcom,mincpubw { compatible = "qcom,devbw"; governor = "powersave"; qcom,src-dst-ports = <1 512>; qcom,active-only; qcom,bw-tbl = < 1525 /* 200 MHz */ >, < 2288 /* 300 MHz */ >, < 3509 /* 460 MHz */ >, < 4173 /* 547 MHz */ >, < 5271 /* 691 MHz */ >, < 5928 /* 777 MHz */ >, < 7102 /* 931 MHz */ >; }; devfreq_cpufreq: devfreq-cpufreq { cpubw-cpufreq { target-dev = <&cpubw>; cpu-to-dev-map-0 = < 600000 1525 >, < 672000 2288 >, < 787200 3509 >, < 864000 4173 >, < 960000 5271 >, < 1248000 7102 >; cpu-to-dev-map-4 = < 384000 1525 >, < 633600 2288 >, < 768000 3509 >, < 864000 4173 >, < 960000 5271 >, < 1344000 5928 >, < 1824000 7102 >; }; mincpubw-cpufreq { target-dev = <&mincpubw>; cpu-to-dev-map-0 = < 300000 1525 >, < 460800 2288 >, < 600000 3509 >, < 672000 4173 >, < 1248000 5271 >; cpu-to-dev-map-4 = < 300000 1525 >, < 480000 2288 >, < 633600 3509 >, < 768000 4173 >, < 1824000 5271 >; }; cci-cpufreq { target-dev = <&cci_cache>; cpu-to-dev-map-0 = < 384000 134400 >, < 600000 300000 >, < 787200 384000 >, < 864000 556800 >, < 960000 729600 >, < 1248000 787200 >; cpu-to-dev-map-4 = < 480000 300000 >, < 633600 384000 >, < 768000 556800 >, < 960000 600000 >, < 1440000 729600 >, < 1824000 787200 >; }; }; msm_cpufreq: qcom,msm-cpufreq { compatible = "qcom,msm-cpufreq"; clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", Loading