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Commit 4428d31e authored by Shivaraj Shetty's avatar Shivaraj Shetty
Browse files

ARM: dts: msm: add MDSS devices for msm-8909 target 



Add MDSS devices for msm-8909 and populate hardware
specific info for different modules within. 8909 uses
mdp3 display processor and DSI 6G controller with
regulators operating in ldo mode.

Change-Id: I2eed1dff07e945e6c03c8680d9a199588e881cb2
Signed-off-by: default avatarShivaraj Shetty <shivaraj@codeaurora.org>
parent 88471d57

arch/arm/boot/dts/qcom/msm8909-mdss.dtsi

0 → 100644
+131 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2014, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	mdss_mdp: qcom,mdss_mdp@1a00000 {

		compatible = "qcom,mdss_mdp3";

		reg = <0x1a00000 0x100000>,

			<0x1ab0000 0x3000>;

		reg-names = "mdp_phys", "vbif_phys";

		interrupts = <0 72 0>;



		vdd-supply = <&gdsc_mdss>;



		vdd-cx-supply = <&pm8909_s1_corner>;

		clocks = <&clock_gcc clk_gcc_mdss_ahb_clk>,

			 <&clock_gcc clk_gcc_mdss_axi_clk>,

			 <&clock_gcc clk_mdp_clk_src>,

			 <&clock_gcc clk_gcc_mdss_mdp_clk>,

			 <&clock_gcc clk_gcc_mdss_vsync_clk>;

		clock-names = "iface_clk", "bus_clk", "core_clk_src",

				"core_clk", "vsync_clk";

		mdss_fb0: qcom,mdss_fb_primary {

			cell-index = <0>;

			compatible = "qcom,mdss-fb";

			qcom,memblock-reserve = <0x83200000 0x800000>;

		};

	};



	mdss_dsi0: qcom,mdss_dsi@1ac8000 {

		compatible = "qcom,mdss-dsi-ctrl";

		label = "MDSS DSI CTRL->0";

		cell-index = <0>;

		reg = <0x1ac8000 0x25c>,

		      <0x1ac8500 0x2b0>,

		      <0x193e000 0x30>;

		reg-names = "dsi_ctrl", "dsi_phy", "mmss_misc_phys";

		qcom,dsi-irq-line;

		interrupts = <0 80 0>;



		qcom,mdss-fb-map = <&mdss_fb0>;

		qcom,mdss-mdp = <&mdss_mdp>;

		gdsc-supply = <&gdsc_mdss>;

		vdda-supply = <&pm8909_l2>;

		vdd-supply = <&pm8909_l17>;

		vddio-supply = <&pm8909_l6>;

		clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>,

			 <&clock_gcc clk_gcc_mdss_ahb_clk>,

			 <&clock_gcc clk_gcc_mdss_axi_clk>,

			 <&clock_gcc_mdss clk_gcc_mdss_byte0_clk>,

			 <&clock_gcc_mdss clk_gcc_mdss_pclk0_clk>,

			 <&clock_gcc clk_gcc_mdss_esc0_clk>;

                clock-names = "mdp_core_clk", "iface_clk", "bus_clk",

				"byte_clk", "pixel_clk", "core_clk";

		qcom,platform-strength-ctrl = [ff 06];

		qcom,platform-bist-ctrl = [00 00 b1 ff 00 00];

		qcom,regulator-ldo-mode;

		qcom,platform-regulator-settings = [02 09 03 00 20 00 01];

		qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97

			00 00 00 00 05 00 00 01 97

			00 00 00 00 0a 00 00 01 97

			00 00 00 00 0f 00 00 01 97

			00 c0 00 00 00 00 00 01 bb];



		qcom,mmss-ulp-clamp-ctrl-offset = <0x20>;

		qcom,mmss-phyreset-ctrl-offset = <0x24>;



		qcom,core-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,core-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};



		qcom,ctrl-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,ctrl-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda";

				qcom,supply-min-voltage = <1200000>;

				qcom,supply-max-voltage = <1200000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

				qcom,supply-post-on-sleep = <20>;

			};

		};



		qcom,panel-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,panel-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdd";

				qcom,supply-min-voltage = <2850000>;

				qcom,supply-max-voltage = <2850000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

			};



			qcom,panel-supply-entry@1 {

				reg = <1>;

				qcom,supply-name = "vddio";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

			};

		};

	};

};



#include "dsi-panel-sim-video.dtsi"

arch/arm/boot/dts/qcom/msm8909-sim.dts

+8 −0
Original line number Diff line number Diff line
@@ -105,3 +105,11 @@ 
&qcom_tzlog {

	status = "okay";

};



&mdss_mdp {

	qcom,mdss-pref-prim-intf = "dsi";

};



&mdss_dsi0 {

	qcom,dsi-pref-prim-pan = <&dsi_sim_vid>;

};

arch/arm/boot/dts/qcom/msm8909.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ 
#include "msm8909-gpu.dtsi"

#include "msm8909-coresight.dtsi"

#include "msm8909-bus.dtsi"

#include "msm8909-mdss.dtsi"

#include "msm8909-mdss-pll.dtsi"



&soc {