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Commit 3f74419d authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Go back to use REG_TO_MEM for the always on counter 



While RECORD_PFP_TIMESTAMP seemed like a good idea at the time it
turns out that the timestamp gets recorded immediately in the PFP
(rather than the ME) so it really only tracks how quickly the
PFP can fetch the IB opcodes. Since this isn't the intent of
the feature go back to REG_TO_MEM to record the timestamp.
REG_TO_MEM is sent to the ME so it won't be executed until after
the command has completed.

Change-Id: Ic0dedbad463c846f4a1440738f13573fa9d90359
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent e67b7ce3

drivers/gpu/msm/adreno.h

+1 −0
Original line number Diff line number Diff line
@@ -430,6 +430,7 @@ enum adreno_regs { 
	ADRENO_REG_RBBM_PERFCTR_LOAD_VALUE_LO,

	ADRENO_REG_RBBM_PERFCTR_LOAD_VALUE_HI,

	ADRENO_REG_RBBM_SECVID_TRUST_CONTROL,

	ADRENO_REG_RBBM_ALWAYSON_COUNTER_LO,

	ADRENO_REG_REGISTER_MAX,

};

drivers/gpu/msm/adreno_a4xx.c

+2 −0
Original line number Diff line number Diff line
@@ -963,6 +963,8 @@ static unsigned int a4xx_register_offsets[ADRENO_REG_REGISTER_MAX] = { 
				A4XX_RBBM_PERFCTR_LOAD_VALUE_HI),

	ADRENO_REG_DEFINE(ADRENO_REG_RBBM_SECVID_TRUST_CONTROL,

				A4XX_RBBM_SECVID_TRUST_CONTROL),

	ADRENO_REG_DEFINE(ADRENO_REG_RBBM_ALWAYSON_COUNTER_LO,

				A4XX_RBBM_ALWAYSON_COUNTER_LO),

};



const struct adreno_reg_offsets a4xx_reg_offsets = {

drivers/gpu/msm/adreno_ringbuffer.c

+29 −16
Original line number Diff line number Diff line
@@ -1264,6 +1264,19 @@ void adreno_ringbuffer_set_constraint(struct kgsl_device *device, 
						context->id);

}



static inline int _get_alwayson_counter(struct adreno_device *adreno_dev,

		unsigned int *cmds, unsigned int gpuaddr)

{

	unsigned int *p = cmds;



	*p++ = cp_type3_packet(CP_REG_TO_MEM, 2);

	*p++ = adreno_getreg(adreno_dev, ADRENO_REG_RBBM_ALWAYSON_COUNTER_LO) |

		(1 << 30) | (2 << 18);

	*p++ = gpuaddr;



	return (unsigned int)(p - cmds);

}



/* adreno_rindbuffer_submitcmd - submit userspace IBs to the GPU */

int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev,

		struct kgsl_cmdbatch *cmdbatch, struct adreno_submit_time *time)
@@ -1354,7 +1367,7 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, 
	if (cmdbatch->flags & KGSL_CMDBATCH_PROFILING &&

		adreno_is_a4xx(adreno_dev) && profile_buffer) {

		cmdbatch_user_profiling = true;

		dwords += 4;

		dwords += 6;



		/*

		 * we want to use an adreno_submit_time struct to get the
@@ -1369,7 +1382,7 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, 


	if (test_bit(CMDBATCH_FLAG_PROFILE, &cmdbatch->priv)) {

		cmdbatch_kernel_profiling = true;

		dwords += 4;

		dwords += 6;

	}



	link = kzalloc(sizeof(unsigned int) *  dwords, GFP_KERNEL);
@@ -1384,10 +1397,10 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, 
	*cmds++ = KGSL_START_OF_IB_IDENTIFIER;



	if (cmdbatch_kernel_profiling) {

		*cmds++ = cp_type3_packet(CP_RECORD_PFP_TIMESTAMP, 1);

		*cmds++ = adreno_dev->cmdbatch_profile_buffer.gpuaddr +

		cmds += _get_alwayson_counter(adreno_dev, cmds,

			adreno_dev->cmdbatch_profile_buffer.gpuaddr +

			ADRENO_CMDBATCH_PROFILE_OFFSET(cmdbatch->profile_index,

				started);

				started));

	}



	/*
@@ -1395,10 +1408,10 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, 
	 * write it into the appropriate cmdbatch profiling buffer offset

	 */

	if (cmdbatch_user_profiling) {

		*cmds++ = cp_type3_packet(CP_RECORD_PFP_TIMESTAMP, 1);

		*cmds++ = cmdbatch->profiling_buffer_gpuaddr +

		cmds += _get_alwayson_counter(adreno_dev, cmds,

			cmdbatch->profiling_buffer_gpuaddr +

			offsetof(struct kgsl_cmdbatch_profiling_buffer,

				gpu_ticks_submitted);

			gpu_ticks_submitted));

	}



	if (numibs) {
@@ -1423,10 +1436,10 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, 
	}



	if (cmdbatch_kernel_profiling) {

		*cmds++ = cp_type3_packet(CP_RECORD_PFP_TIMESTAMP, 1);

		*cmds++ = adreno_dev->cmdbatch_profile_buffer.gpuaddr +

		cmds += _get_alwayson_counter(adreno_dev, cmds,

			adreno_dev->cmdbatch_profile_buffer.gpuaddr +

			ADRENO_CMDBATCH_PROFILE_OFFSET(cmdbatch->profile_index,

				retired);

				retired));

	}



	/*
@@ -1434,10 +1447,10 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev, 
	 * write it into the appropriate cmdbatch profiling buffer offset

	 */

	if (cmdbatch_user_profiling) {

		*cmds++ = cp_type3_packet(CP_RECORD_PFP_TIMESTAMP, 1);

		*cmds++ = cmdbatch->profiling_buffer_gpuaddr +

		cmds += _get_alwayson_counter(adreno_dev, cmds,

			cmdbatch->profiling_buffer_gpuaddr +

			offsetof(struct kgsl_cmdbatch_profiling_buffer,

				gpu_ticks_retired);

			gpu_ticks_retired));

	}



	*cmds++ = cp_nop_packet(1);