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Commit 3f6cf8f3 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Fix freezing of counter when reading it"

parents ffea1c18 e1e06d47

drivers/gpu/msm/a3xx_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -493,6 +493,9 @@ 
#define RBBM_RBBM_CTL_ENABLE_PWR_CTR0  BIT(16)

#define RBBM_RBBM_CTL_ENABLE_PWR_CTR1  BIT(17)



/* Bit flag for RBMM_PERFCTR_CTL */

#define RBBM_PERFCTR_CTL_ENABLE BIT(0)



/* Various flags used by the context switch code */



#define SP_MULTI 0

drivers/gpu/msm/adreno_a3xx.c

+5 −7
Original line number Diff line number Diff line
@@ -3376,8 +3376,8 @@ static uint64_t a3xx_perfcounter_read(struct adreno_device *adreno_dev, 
	struct kgsl_device *device = &adreno_dev->dev;

	struct adreno_perfcount_register *reg;

	unsigned int lo = 0, hi = 0;

	unsigned int val;

	unsigned int offset;

	unsigned int in, out;



	if (group == KGSL_PERFCOUNTER_GROUP_VBIF_PWR)

		return a3xx_perfcounter_read_vbif_pwr(adreno_dev, counter);
@@ -3399,9 +3399,9 @@ static uint64_t a3xx_perfcounter_read(struct adreno_device *adreno_dev, 
	reg = &(adreno_dev->gpudev->perfcounters->groups[group].regs[counter]);



	/* Freeze the counter */

	kgsl_regread(device, A3XX_RBBM_PERFCTR_CTL, &val);

	val &= ~reg->load_bit;

	kgsl_regwrite(device, A3XX_RBBM_PERFCTR_CTL, val);

	kgsl_regread(device, A3XX_RBBM_PERFCTR_CTL, &in);

	out = in & ~RBBM_PERFCTR_CTL_ENABLE;

	kgsl_regwrite(device, A3XX_RBBM_PERFCTR_CTL, out);



	offset = reg->offset;

	/* Read the values */
@@ -3409,9 +3409,7 @@ static uint64_t a3xx_perfcounter_read(struct adreno_device *adreno_dev, 
	kgsl_regread(device, offset + 1, &hi);



	/* Re-Enable the counter */

	val |= reg->load_bit;

	kgsl_regwrite(device, A3XX_RBBM_PERFCTR_CTL, val);



	kgsl_regwrite(device, A3XX_RBBM_PERFCTR_CTL, in);

	return (((uint64_t) hi) << 32) | lo;

}