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Commit 3ebe696f authored by Chun Zhang's avatar Chun Zhang
Browse files

ARM: dts: msm: add support for JDI panel on 8939 CDP



JDI panel utilizes SPI interface for touch and 3V power rail. Make
such changes in device tree file to address these needs.

Change-Id: I47c48f7d08ae23cd739260343940940ae18ee416
Signed-off-by: default avatarChun Zhang <chunz@codeaurora.org>
parent a838745c
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+84 −0
Original line number Diff line number Diff line
@@ -14,9 +14,93 @@

#include "msm8939.dtsi"
#include "msm8939-cdp.dtsi"
#include "msm8939-regulator.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. MSM 8939 CDP JDI";
	compatible = "qcom,msm8939-cdp", "qcom,msm8939", "qcom,cdp";
	qcom,board-id = <1 1>;
};

&pm8916_l17 {
	regulator-max-microvolt = <3000000>;
	regulator-min-microvolt = <3000000>;
	qcom,init-voltage = <3000000>;
};

&i2c_5 {  /* BLSP1 QUP5 */
	status = "disabled";
};

&spi_5 {
	status = "okay";
	bu21150-ts-spi@0 {
		compatible = "jdi,bu21150";
		reg = <0>;
		interrupt-parent = <&msm_gpio>;
		interrupts = <13 0>;
		spi-max-frequency = <5000000>;
		pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
				"afe_pwr_active", "afe_pwr_suspend",
				"disp_vsn_active", "disp_vsn_suspend";
		pinctrl-0 = <&ts_int_active &ts_reset_active>;
		pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
		pinctrl-2 = <&afe_pwr_active>;
		pinctrl-3 = <&afe_pwr_suspend>;
		pinctrl-4 = <&disp_vsn_active>;
		pinctrl-5 = <&disp_vsn_suspend>;
		irq-gpio = <&msm_gpio 13 0>;
		rst-gpio = <&msm_gpio 12 0>;
		vdd_ana-supply = <&pm8916_l17>;
	};
};

#include "dsi-panel-jdi-fhd-video.dtsi"
#include "msm8939-mdss.dtsi"

&dsi_jdi_fhd_video {
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
	qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;
	qcom,mdss-dsi-bl-pmic-bank-select = <0>;
	qcom,mdss-dsi-pwm-gpio = <&pm8916_mpps 4 0>;
	qcom,cont-splash-enabled;
};

&mdss_dsi0 {
	pinctrl-names = "mdss_default", "mdss_sleep";
	pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
	pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
	qcom,dsi-pref-prim-pan = <&dsi_jdi_fhd_video>;

	qcom,platform-enable-gpio = <&msm_gpio 97 0>;
	qcom,platform-reset-gpio = <&msm_gpio 25 0>;
	qcom,platform-bklight-en-gpio = <&msm_gpio 98 0>;

	qcom,platform-strength-ctrl = [77 06];

	qcom,panel-supply-entries {
		qcom,panel-supply-entry@0 {
			qcom,supply-min-voltage = <3000000>;
			qcom,supply-max-voltage = <3000000>;
		};
	};
};

#include "msm8939-camera-sensor-cdp.dtsi"

&cci {
	qcom,camera@78 {
		qcom,cam-vreg-min-voltage = <2100000 0 3000000>;
		qcom,cam-vreg-max-voltage = <2100000 0 3000000>;
	};

	qcom,camera@0 {
		qcom,cam-vreg-min-voltage = <2100000 0 3000000 2800000>;
		qcom,cam-vreg-max-voltage = <2100000 0 3000000 2800000>;
	};

	qcom,camera@1 {
		qcom,cam-vreg-min-voltage = <2100000 0 3000000>;
		qcom,cam-vreg-max-voltage = <2100000 0 3000000>;
	};
};
+26 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@
		i2c5 = &i2c_5;
		i2c6 = &i2c_6;
		spi0 = &spi_0;
		spi5 = &spi_5;
	};

	memory {
@@ -955,6 +956,31 @@
		qcom,master-id = <86>;
	};

	spi_5: spi@78b9000 {  /* BLSP1 QUP5 */
		compatible = "qcom,spi-qup-v2";
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "spi_physical", "spi_bam_physical";
		reg = <0x78b9000 0x1000>,
			<0x7884000 0x19000>;
		interrupt-names = "spi_irq", "spi_bam_irq";
		interrupts = <0 99 0>, <0 238 0>;
		spi-max-frequency = <5000000>;
		qcom,use-pinctrl;
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <&spi5_default &spi5_cs0_active>;
		pinctrl-1 = <&spi5_sleep &spi5_cs0_sleep>;
		clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
			<&clock_gcc clk_gcc_blsp1_qup5_spi_apps_clk>;
		clock-names = "iface_clk", "core_clk";
		qcom,infinite-mode = <0>;
		qcom,use-bam;
		qcom,ver-reg-exists;
		qcom,bam-consumer-pipe-index = <12>;
		qcom,bam-producer-pipe-index = <13>;
		qcom,master-id = <86>;
		status = "disabled";
	};

	spmi_bus: qcom,spmi@200f000 {
		compatible = "qcom,spmi-pmic-arb";
+98 −0
Original line number Diff line number Diff line
@@ -368,6 +368,56 @@
			};
		};

		spi5_active {
                        /* MOSI, MISO, CLK */
                        qcom,pins = <&gp 16>, <&gp 17>, <&gp 19>;
                        qcom,num-grp-pins = <3>;
                        qcom,pin-func = <1>;
                        label = "spi5-active";
                        /* active state */
                        spi5_default: default {
                                drive-strength = <16>; /* 16 MA */
                                bias-disable = <0>; /* No PULL */
                        };
                };

                spi5_suspend {
                        /* MOSI, MISO, CLK */
                        qcom,pins = <&gp 16>, <&gp 17>, <&gp 19>;
                        qcom,num-grp-pins = <3>;
                        qcom,pin-func = <0>;
                        label = "spi5-suspend";
                        /* suspended state */
                        spi5_sleep: sleep {
                                drive-strength = <2>; /* 2 MA */
                                bias-disable = <0>; /* No PULL */
                        };
                };

                spi5_cs0_active {
                        /* CS */
                        qcom,pins = <&gp 18>;
                        qcom,num-grp-pins = <1>;
                        qcom,pin-func = <1>;
                        label = "spi5-cs0-active";
                        spi5_cs0_active: cs0_active {
                                drive-strength = <2>;
                                bias-disable = <0>;
                        };
                };

                spi5_cs0_suspend {
                        /* CS */
                        qcom,pins = <&gp 18>;
                        qcom,num-grp-pins = <1>;
                        qcom,pin-func = <0>;
                        label = "spi5-cs0-suspend";
                        spi5_cs0_sleep: cs0_sleep {
                                drive-strength = <2>;
                                bias-disable = <0>;
                        };
                };

		wcnss_pmux_gpio: wcnss_pmux_gpio {
			/* Uses general purpose pins */
			qcom,pins = <&gp 40>, <&gp 41>,
@@ -447,6 +497,54 @@
			};
		};

		afe_pwr_active {
			qcom,pins = <&gp 75>;
			qcom,pin-func = <0>;
			qcom,num-grp-pins = <1>;
			label = "afe_active";

			afe_pwr_active: afe_pwr_active {
				drive-strength = <16>;
				output-high;
			};
		};

		afe_pwr_suspend {
			qcom,pins = <&gp 75>;
			qcom,pin-func = <0>;
			qcom,num-grp-pins = <1>;
			label = "afe_suspend";

			afe_pwr_suspend: afe_pwr_suspend {
				drive-strength = <2>;
				output-low;
			};
		};

		disp_vsn_active {
			qcom,pins = <&gp 77>;
			qcom,pin-func = <0>;
			qcom,num-grp-pins = <1>;
			label = "disp_vsn_active";

			disp_vsn_active: disp_vsn_active {
				drive-strength = <16>;
				output-high;
			};
		};

		disp_vsn_suspend {
			qcom,pins = <&gp 77>;
			qcom,pin-func = <0>;
			qcom,num-grp-pins = <1>;
			label = "disp_vsn_suspend";

			disp_vsn_suspend: disp_vsn_suspend {
				drive-strength = <2>;
				output-low;
			};
		};

		pmx_ts_release {
			qcom,pins = <&gp 13>, <&gp 12>;
			qcom,num-grp-pins = <2>;