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Commit 3d0decc9 authored by Maheshwar Ajja's avatar Maheshwar Ajja
Browse files

arm/dt: msm8916: Add device tree node for venus 



Add device tree node for venus to support hardware
accelerated video codecs.

Change-Id: Ieb26989fcb4d53ac3a89b2e95be13572982b9a68
Signed-off-by: default avatarMaheshwar Ajja <majja@codeaurora.org>
parent f3965dba

arch/arm/boot/dts/qcom/msm8916-iommu-domains.dtsi

0 → 100644
+59 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2014, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	qcom,iommu-domains {

		compatible = "qcom,iommu-domains";



		/*

		 * non-secure addr pool from 1500 MB to 3532 MB

		 *                           3532 MB to 3548 MB

		 */

		venus_domain_ns: qcom,iommu-domain1 {

			label = "venus_ns";

			qcom,iommu-contexts = <&venus_ns>;

			qcom,virtual-addr-pool = <0x5dc00000 0x7f000000

						  0xdcc00000 0x1000000>;

		};



		/*

		 * secure bitstream addr pool from 1200 MB to 1500 MB

		 */

		venus_domain_sec_bitstream: qcom,iommu-domain2 {

			label = "venus_sec_bitstream";

			qcom,iommu-contexts = <&venus_sec_bitstream>;

			qcom,virtual-addr-pool = <0x4b000000 0x12c00000>;

			qcom,secure-domain;

		};



		/*

		 * secure pixel addr pool from 616 MB to 1200 MB

		 */

		venus_domain_sec_pixel: qcom,iommu-domain3 {

			label = "venus_sec_pixel";

			qcom,iommu-contexts = <&venus_sec_pixel>;

			qcom,virtual-addr-pool = <0x25800000 0x25800000>;

			qcom,secure-domain;

		};



		/*

		 * secure non-pixel addr pool from 16 MB to 616 MB

		 */

		venus_domain_sec_non_pixel: qcom,iommu-domain4 {

			label = "venus_sec_non_pixel";

			qcom,iommu-contexts = <&venus_sec_non_pixel>;

			qcom,virtual-addr-pool = <0x1000000 0x24800000>;

			qcom,secure-domain;

		};



	};

};

arch/arm/boot/dts/qcom/msm8916.dtsi

+61 −0
Original line number Diff line number Diff line
@@ -109,6 +109,7 @@ 
#include "msm8916-iommu.dtsi"

#include "msm8916-gpu.dtsi"

#include "msm8916-mdss.dtsi"

#include "msm8916-iommu-domains.dtsi"



&soc {

	#address-cells = <1>;
@@ -1107,6 +1108,66 @@ 
	qcom,bcl {

		compatible = "qcom,bcl";

	};



	qcom,vidc@1d00000 {

		compatible = "qcom,msm-vidc";

		reg = <0x01d00000 0xff000>;

		interrupts = <0 44 0>;

		venus-supply = <&gdsc_venus>;

		clocks = <&clock_gcc clk_gcc_venus0_vcodec0_clk>,

			 <&clock_gcc clk_gcc_venus0_ahb_clk>,

			 <&clock_gcc clk_gcc_venus0_axi_clk>;

		clock-names = "core_clk", "iface_clk", "bus_clk";

		qcom,clock-names = "core_clk", "iface_clk", "bus_clk";

		qcom,clock-configs = <0x3 0x0 0x0>;

		qcom,load-freq-tbl = <352800 228570000>,

			<244800 160000000>,

			<108000 100000000>;

		qcom,hfi = "venus";

		qcom,bus-ports = <1>;

		qcom,reg-presets = <0xE0020 0x05555556>,

			<0xE0024 0x00000000>,

			<0x80124 0x00000003>,

			<0x800B0 0x10101001>,

			<0x800B4 0x00101010>,

			<0x800C0 0x1010100f>,

			<0x800C4 0x00101010>,

			<0x800D0 0x00000010>,

			<0x800D4 0x00000010>,

			<0x800D8 0x00000707>;

		qcom,enc-ddr-ab-ib = <0 0>,

			<129000 142000>,

			<384000 422000>,

			<866000 953000>;

		qcom,dec-ddr-ab-ib = <0 0>,

			<103000 134000>,

			<268000 348000>,

			<505000 657000>;

		qcom,buffer-type-tz-usage-table = <0x1 0x1>,

			<0x6 0x2>,

			<0x7C0 0x3>;

		qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */

		qcom,vidc-iommu-domains {

			qcom,domain-ns {

				qcom,vidc-domain-phandle = <&venus_domain_ns>;

				qcom,vidc-partition-buffer-types = <0x7ff>,

							<0x800>;

			};

			qcom,domain-sec-bs {

				qcom,vidc-domain-phandle = <&venus_domain_sec_bitstream>;

				qcom,vidc-partition-buffer-types = <0x241>;

			};

			qcom,domain-sec-px {

				qcom,vidc-domain-phandle = <&venus_domain_sec_pixel>;

				qcom,vidc-partition-buffer-types = <0x106>;

			};

			qcom,domain-sec-np {

				qcom,vidc-domain-phandle = <&venus_domain_sec_non_pixel>;

				qcom,vidc-partition-buffer-types = <0x480>;

			};

		};

	};



};



&gdsc_venus {