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Commit 3b7e9557 authored by Xiaocheng Li's avatar Xiaocheng Li
Browse files

ARM: dts: msm: Add UART support for 8939 



Add UART1 and UART2 support in DT.

Change-Id: Id52765f56b4291bfe13ba05d461bdadf7c78971c
Signed-off-by: default avatarXiaocheng Li <lix@codeaurora.org>
Signed-off-by: default avatarSrinivas Ramana <sramana@codeaurora.org>
parent 4c52f3c7

arch/arm/boot/dts/qcom/msm8936-rumi.dts

+3 −0
Original line number Diff line number Diff line
@@ -26,3 +26,6 @@ 
	};

};



&blsp1_uart2 {

	status = "ok";

};

arch/arm/boot/dts/qcom/msm8936-sim.dts

+3 −0
Original line number Diff line number Diff line
@@ -25,3 +25,6 @@ 
	interrupt-names = "core_irq";

};



&blsp1_uart2 {

	status = "ok";

};

arch/arm/boot/dts/qcom/msm8936.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -402,4 +402,24 @@ 
		compatible = "qcom,android-usb";

		qcom,android-usb-swfi-latency = <1>;

	};



	blsp1_uart1: serial@78af000 {

		compatible = "qcom,msm-lsuart-v14";

		reg = <0x78af000 0x200>;

		interrupts = <0 107 0>;

		status = "disabled";

		clocks = <&clock_gcc clk_gcc_blsp1_uart1_apps_clk>,

			 <&clock_gcc clk_gcc_blsp1_ahb_clk>;

		clock-names = "core_clk", "iface_clk";

	};



	blsp1_uart2: serial@78b0000 {

		compatible = "qcom,msm-lsuart-v14";

		reg = <0x78b0000 0x200>;

		interrupts = <0 108 0>;

		status = "disabled";

		clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,

			 <&clock_gcc clk_gcc_blsp1_ahb_clk>;

		clock-names = "core_clk", "iface_clk";

	};

};