ARM: pxa: fix logic error in PJ4 iWMMXt handling (392ba787) · Commits · e / devices / android_kernel_sony_msm8994

This got added in: commit Author: Haojian Zhuang <haojian.zhuang@marvell.com> Date: Wed Nov 24 11:54:25 2010 +0800 ARM: pxa: add iwmmx support for PJ4 which does: - mrc p15, 0, r2, c15, c1, 0 - orr r2, r2, #0x3 @ enable access to CP0 and CP1 - mcr p15, 0, r2, c15, c1, 0 + @ enable access to CP0 and CP1 + XSC(mrc p15, 0, r2, c15, c1, 0) + XSC(orr r2, r2, #0x3) + XSC(mcr p15, 0, r2, c15, c1, 0) but then later does: - mrc p15, 0, r4, c15, c1, 0 - orr r4, r4, #0x3 @ enable access to CP0 and CP1 - mcr p15, 0, r4, c15, c1, 0 + @ enable access to CP0 and CP1 + XSC(mrc p15, 0, r4, c15, c1, 0) + XSC(orr r4, r4, #0xf) + XSC(mcr p15, 0, r4, c15, c1, 0) Signed-off-by:

Lennert Buytenhek <buytenh@laptop.org> Acked-by Haojian <haojian.zhuang@gmail.com> Signed-off-by:

Eric Miao <eric.y.miao@gmail.com>

arch/arm/kernel/iwmmxt.S

+3 −3

Original line number	Original line	Diff line number	Diff line
	@@ -195,10 +195,10 @@ ENTRY(iwmmxt_task_disable)

	@ enable access to CP0 and CP1		@ enable access to CP0 and CP1
	XSC(mrc p15, 0, r4, c15, c1, 0)		XSC(mrc p15, 0, r4, c15, c1, 0)
	XSC(orr r4, r4, #0xf)		XSC(orr r4, r4, #0x3)
	XSC(mcr p15, 0, r4, c15, c1, 0)		XSC(mcr p15, 0, r4, c15, c1, 0)
	PJ4(mrc p15, 0, r4, c1, c0, 2)		PJ4(mrc p15, 0, r4, c1, c0, 2)
	PJ4(orr r4, r4, #0x3)		PJ4(orr r4, r4, #0xf)
	PJ4(mcr p15, 0, r4, c1, c0, 2)		PJ4(mcr p15, 0, r4, c1, c0, 2)

	mov r0, #0 @ nothing to load		mov r0, #0 @ nothing to load
	@@ -313,7 +313,7 @@ ENTRY(iwmmxt_task_switch)
	teq r2, r3 @ next task owns it?		teq r2, r3 @ next task owns it?
	movne pc, lr @ no: leave Concan disabled		movne pc, lr @ no: leave Concan disabled

	1: @ flip Conan access		1: @ flip Concan access
	XSC(eor r1, r1, #0x3)		XSC(eor r1, r1, #0x3)
	XSC(mcr p15, 0, r1, c15, c1, 0)		XSC(mcr p15, 0, r1, c15, c1, 0)
	PJ4(eor r1, r1, #0xf)		PJ4(eor r1, r1, #0xf)