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Commit 3878b393 authored by Ajay Singh Parmar's avatar Ajay Singh Parmar
Browse files

msm: mdss: hdmi: add new resolutions at runtime 



EDID (Extended Display Identification Data) may contain some
resolutions in DTDs (Detailed Timing Descriptors) which are not
in the supported resolutions list. In such cases, every time
when the HDMI cable is connected, parse all the resolution data
from DTD and populate the resolution list with the newly found
resolution. This way any resolution found in DTD can be supported
subjected to hardware limitations.

Change-Id: Ib2223e34820a70da0b03b8ac39b170cf6b3e65b5
Signed-off-by: default avatarAjay Singh Parmar <aparmar@codeaurora.org>
parent 5742c327

drivers/video/msm/mdss/mdss_hdmi_edid.c

+93 −4
Original line number Diff line number Diff line 
/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.

/* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -748,6 +748,7 @@ static void hdmi_edid_detail_desc(struct hdmi_edid_ctrl *edid_ctrl, 
	const u8 *data_buf, u32 *disp_mode)

{

	u32	aspect_ratio_4_3    = false;

	u32	aspect_ratio_5_4    = false;

	u32	interlaced          = false;

	u32	active_h            = 0;

	u32	active_v            = 0;
@@ -756,6 +757,52 @@ static void hdmi_edid_detail_desc(struct hdmi_edid_ctrl *edid_ctrl, 
	u32	ndx                 = 0;

	u32	img_size_h          = 0;

	u32	img_size_v          = 0;

	u32	pixel_clk           = 0;

	u32	front_porch_h       = 0;

	u32	front_porch_v       = 0;

	u32	pulse_width_h       = 0;

	u32	pulse_width_v       = 0;

	u32	active_low_h        = 0;

	u32	active_low_v        = 0;



	/*

	 * Pixel clock/ 10,000

	 * LSB stored in byte 0 and MSB stored in byte 1

	 */

	pixel_clk = (u32) (data_buf[0x0] | (data_buf[0x1] << 8));



	/* store pixel clock in /1000 terms */

	pixel_clk *= 10;



	/*

	 * byte 0x8 -- Horizontal Front Porch - contains lower 8 bits

	 * byte 0xb (bits 6, 7) -- contains upper 2 bits

	 */

	front_porch_h = (u32) (data_buf[0x8] |

		(data_buf[0xb] & (0x3 << 6)) << 2);



	/*

	 * byte 0x9 -- Horizontal pulse width - contains lower 8 bits

	 * byte 0xb (bits 4, 5) -- contains upper 2 bits

	 */

	pulse_width_h = (u32) (data_buf[0x9] |

		(data_buf[0xb] & (0x3 << 4)) << 4);



	/*

	 * byte 0xa -- Vertical front porch -- stored in Upper Nibble,

	 * contains lower 4 bits.

	 * byte 0xb (bits 2, 3) -- contains upper 2 bits

	 */

	front_porch_v = (u32) (((data_buf[0xa] & (0xF << 4)) >> 4) |

		(data_buf[0xb] & (0x3 << 2)) << 2);



	/*

	 * byte 0xa -- Vertical pulse width -- stored in Lower Nibble,

	 * contains lower 4 bits.

	 * byte 0xb (bits 0, 1) -- contains upper 2 bits

	 */

	pulse_width_v = (u32) ((data_buf[0xa] & 0xF) |

		((data_buf[0xb] & 0x3) << 4));



	/*

	 * * See VESA Spec
@@ -812,6 +859,8 @@ static void hdmi_edid_detail_desc(struct hdmi_edid_ctrl *edid_ctrl, 
	 */

	aspect_ratio_4_3 = (abs(img_size_h * 3 - img_size_v * 4) < 5) ? 1 : 0;



	aspect_ratio_5_4 = (abs(img_size_h * 4 - img_size_v * 5) < 5) ? 1 : 0;



	/*

	 * EDID_TIMING_DESC_INTERLACE[0x11:7]: Relative Offset to the EDID

	 * detailed timing descriptors - Interlace flag
@@ -824,6 +873,11 @@ static void hdmi_edid_detail_desc(struct hdmi_edid_ctrl *edid_ctrl, 
	 */

	interlaced = (data_buf[0x11] & 0x80) >> 7;



	active_low_v = ((data_buf[0x11] & (0x7 << 2)) >> 2) == 0x7 ? 0 : 1;



	active_low_h = ((data_buf[0x11] & BIT(1)) &&

				(data_buf[0x11] & BIT(4))) ? 0 : 1;



	DEV_DBG("%s: A[%ux%u] B[%ux%u] V[%ux%u] %s\n", __func__,

		active_h, active_v, blank_h, blank_v, img_size_h, img_size_v,

		interlaced ? "i" : "p");
@@ -867,10 +921,43 @@ static void hdmi_edid_detail_desc(struct hdmi_edid_ctrl *edid_ctrl, 
		}

	}



	if (*disp_mode == HDMI_VFRMT_FORCE_32BIT)

		DEV_INFO("%s: *no mode* found\n", __func__);

	else

	if (*disp_mode == HDMI_VFRMT_FORCE_32BIT) {

		struct msm_hdmi_mode_timing_info timing = {0};

		u64 rr_tmp = pixel_clk * 1000 * 1000;

		u64 frame_data = (blank_h + active_h) *

			(blank_v + active_v);

		int rc = 0;



		DEV_DBG("%s: found new mode\n", __func__);



		do_div(rr_tmp, frame_data);



		timing.active_h      = active_h;

		timing.front_porch_h = front_porch_h;

		timing.pulse_width_h = pulse_width_h;

		timing.back_porch_h  = blank_h -

					(front_porch_h + pulse_width_h);

		timing.active_low_h  = active_low_h;

		timing.active_v      = active_v;

		timing.front_porch_v = front_porch_v;

		timing.pulse_width_v = pulse_width_v;

		timing.back_porch_v  = blank_v -

					(front_porch_v + pulse_width_v);

		timing.active_low_v  = active_low_v;

		timing.pixel_freq    = pixel_clk;

		timing.refresh_rate  = (u32) rr_tmp;

		timing.interlaced    = interlaced;

		timing.supported     = true;

		timing.ar            = aspect_ratio_4_3 ? HDMI_RES_AR_4_3 :

					(aspect_ratio_5_4 ? HDMI_RES_AR_5_4 :

						HDMI_RES_AR_16_9);



		rc = hdmi_set_resv_timing_info(&timing);

		if (!IS_ERR_VALUE(rc))

			*disp_mode = rc;

	} else {

		DEV_DBG("%s: mode found:%d\n", __func__, *disp_mode);

	}

} /* hdmi_edid_detail_desc */



static void hdmi_edid_add_sink_3d_format(struct hdmi_edid_sink_data *sink_data,
@@ -1506,6 +1593,8 @@ int hdmi_edid_read(void *input) 
	edid_ctrl->adb_size = 0;

	edid_ctrl->sadb_size = 0;



	hdmi_reset_resv_timing_info();



	status = hdmi_edid_read_block(edid_ctrl, 0, edid_buf);

	if (status || !hdmi_edid_check_header(edid_buf)) {

		if (!status)

drivers/video/msm/mdss/mdss_hdmi_util.c

+164 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.

/* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -19,6 +19,169 @@ 


static char res_buf[RESOLUTION_NAME_STR_LEN];



static struct msm_hdmi_mode_timing_info hdmi_resv_timings[

		RESERVE_VFRMT_END - HDMI_VFRMT_RESERVE1 + 1];



static int hdmi_get_resv_timing_info(

	struct msm_hdmi_mode_timing_info *mode, int id)

{

	int i;



	for (i = 0; i < ARRAY_SIZE(hdmi_resv_timings); i++) {

		struct msm_hdmi_mode_timing_info *info = &hdmi_resv_timings[i];

		if (info->video_format == id) {

			*mode = *info;

			return 0;

		}

	}



	return -EINVAL;

}



int hdmi_set_resv_timing_info(struct msm_hdmi_mode_timing_info *mode)

{

	int i;



	for (i = 0; i < ARRAY_SIZE(hdmi_resv_timings); i++) {

		struct msm_hdmi_mode_timing_info *info = &hdmi_resv_timings[i];

		if (info->video_format == 0) {

			*info = *mode;

			info->video_format = HDMI_VFRMT_RESERVE1 + i;

			return info->video_format;

		}

	}



	return -ENOMEM;

}



void hdmi_reset_resv_timing_info(void)

{

	int i;



	for (i = 0; i < ARRAY_SIZE(hdmi_resv_timings); i++) {

		struct msm_hdmi_mode_timing_info *info = &hdmi_resv_timings[i];

		info->video_format = 0;

	}

}



int msm_hdmi_get_timing_info(

	struct msm_hdmi_mode_timing_info *mode, int id)

{

	int ret = 0;



	switch (id) {

	case HDMI_VFRMT_640x480p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_640x480p60_4_3);

		break;

	case HDMI_VFRMT_720x480p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_720x480p60_4_3);

		break;

	case HDMI_VFRMT_720x480p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_720x480p60_16_9);

		break;

	case HDMI_VFRMT_1280x720p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x720p60_16_9);

		break;

	case HDMI_VFRMT_1920x1080i60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080i60_16_9);

		break;

	case HDMI_VFRMT_1440x480i60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x480i60_4_3);

		break;

	case HDMI_VFRMT_1440x480i60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x480i60_16_9);

		break;

	case HDMI_VFRMT_1920x1080p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p60_16_9);

		break;

	case HDMI_VFRMT_720x576p50_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_720x576p50_4_3);

		break;

	case HDMI_VFRMT_720x576p50_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_720x576p50_16_9);

		break;

	case HDMI_VFRMT_1280x720p50_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x720p50_16_9);

		break;

	case HDMI_VFRMT_1440x576i50_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x576i50_4_3);

		break;

	case HDMI_VFRMT_1440x576i50_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x576i50_16_9);

		break;

	case HDMI_VFRMT_1920x1080p50_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p50_16_9);

		break;

	case HDMI_VFRMT_1920x1080p24_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p24_16_9);

		break;

	case HDMI_VFRMT_1920x1080p25_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p25_16_9);

		break;

	case HDMI_VFRMT_1920x1080p30_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p30_16_9);

		break;

	case HDMI_VFRMT_3840x2160p30_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p30_16_9);

		break;

	case HDMI_VFRMT_3840x2160p25_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p25_16_9);

		break;

	case HDMI_VFRMT_3840x2160p24_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p24_16_9);

		break;

	case HDMI_VFRMT_4096x2160p24_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_4096x2160p24_16_9);

		break;

	case HDMI_VFRMT_1024x768p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1024x768p60_4_3);

		break;

	case HDMI_VFRMT_1280x1024p60_5_4:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x1024p60_5_4);

		break;

	case HDMI_VFRMT_2560x1600p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_2560x1600p60_16_9);

		break;

	case HDMI_VFRMT_800x600p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_800x600p60_4_3);

		break;

	case HDMI_VFRMT_848x480p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_848x480p60_16_9);

		break;

	case HDMI_VFRMT_1280x960p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x960p60_4_3);

		break;

	case HDMI_VFRMT_1360x768p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1360x768p60_16_9);

		break;

	case HDMI_VFRMT_1440x900p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x900p60_16_10);

		break;

	case HDMI_VFRMT_1400x1050p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1400x1050p60_4_3);

		break;

	case HDMI_VFRMT_1680x1050p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1680x1050p60_16_10);

		break;

	case HDMI_VFRMT_1600x1200p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1600x1200p60_4_3);

		break;

	case HDMI_VFRMT_1920x1200p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1200p60_16_10);

		break;

	case HDMI_VFRMT_1366x768p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1366x768p60_16_10);

		break;

	case HDMI_VFRMT_1280x800p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x800p60_16_10);

		break;

	default:

		ret = hdmi_get_resv_timing_info(mode, id);

	}



	return ret;

}



int hdmi_get_supported_mode(struct msm_hdmi_mode_timing_info *info,

	struct hdmi_util_ds_data *ds_data, u32 mode)

{

drivers/video/msm/mdss/mdss_hdmi_util.h

+3 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.

/* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -267,6 +267,8 @@ int hdmi_get_supported_mode(struct msm_hdmi_mode_timing_info *info, 
	struct hdmi_util_ds_data *ds_data, u32 mode);

ssize_t hdmi_get_video_3d_fmt_2string(u32 format, char *buf, u32 size);

const char *msm_hdmi_mode_2string(u32 mode);

int hdmi_set_resv_timing_info(struct msm_hdmi_mode_timing_info *mode);

void hdmi_reset_resv_timing_info(void);



/* todo: Fix this. Right now this is defined in mdss_hdmi_tx.c */

void *hdmi_get_featuredata_from_sysfs_dev(struct device *device, u32 type);

include/uapi/video/msm_hdmi_modes.h

+13 −118
Original line number Diff line number Diff line
@@ -172,7 +172,19 @@ struct msm_hdmi_mode_timing_info { 
#define HDMI_VFRMT_1920x1200p60_16_10	ETIII_OFF(8)

#define ETIII_VFRMT_END			HDMI_VFRMT_1920x1200p60_16_10



#define HDMI_VFRMT_MAX			(ETIII_VFRMT_END + 1)

#define RESERVE_OFF(x)			(ETIII_VFRMT_END + x)



#define HDMI_VFRMT_RESERVE1		RESERVE_OFF(1)

#define HDMI_VFRMT_RESERVE2		RESERVE_OFF(2)

#define HDMI_VFRMT_RESERVE3		RESERVE_OFF(3)

#define HDMI_VFRMT_RESERVE4		RESERVE_OFF(4)

#define HDMI_VFRMT_RESERVE5		RESERVE_OFF(5)

#define HDMI_VFRMT_RESERVE6		RESERVE_OFF(6)

#define HDMI_VFRMT_RESERVE7		RESERVE_OFF(7)

#define HDMI_VFRMT_RESERVE8		RESERVE_OFF(8)

#define RESERVE_VFRMT_END		HDMI_VFRMT_RESERVE8



#define HDMI_VFRMT_MAX			(RESERVE_VFRMT_END + 1)

#define HDMI_VFRMT_FORCE_32BIT		0x7FFFFFFF



/* Timing information for supported modes */
@@ -387,121 +399,4 @@ do { \ 
	*mode = info;						\

	} while (0)



static inline int msm_hdmi_get_timing_info(

	struct msm_hdmi_mode_timing_info *mode, int id)

{

	int ret = 0;



	switch (id) {

	case HDMI_VFRMT_640x480p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_640x480p60_4_3);

		break;

	case HDMI_VFRMT_720x480p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_720x480p60_4_3);

		break;

	case HDMI_VFRMT_720x480p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_720x480p60_16_9);

		break;

	case HDMI_VFRMT_1280x720p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x720p60_16_9);

		break;

	case HDMI_VFRMT_1920x1080i60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080i60_16_9);

		break;

	case HDMI_VFRMT_1440x480i60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x480i60_4_3);

		break;

	case HDMI_VFRMT_1440x480i60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x480i60_16_9);

		break;

	case HDMI_VFRMT_1920x1080p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p60_16_9);

		break;

	case HDMI_VFRMT_720x576p50_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_720x576p50_4_3);

		break;

	case HDMI_VFRMT_720x576p50_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_720x576p50_16_9);

		break;

	case HDMI_VFRMT_1280x720p50_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x720p50_16_9);

		break;

	case HDMI_VFRMT_1440x576i50_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x576i50_4_3);

		break;

	case HDMI_VFRMT_1440x576i50_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x576i50_16_9);

		break;

	case HDMI_VFRMT_1920x1080p50_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p50_16_9);

		break;

	case HDMI_VFRMT_1920x1080p24_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p24_16_9);

		break;

	case HDMI_VFRMT_1920x1080p25_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p25_16_9);

		break;

	case HDMI_VFRMT_1920x1080p30_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p30_16_9);

		break;

	case HDMI_VFRMT_3840x2160p30_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p30_16_9);

		break;

	case HDMI_VFRMT_3840x2160p25_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p25_16_9);

		break;

	case HDMI_VFRMT_3840x2160p24_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p24_16_9);

		break;

	case HDMI_VFRMT_4096x2160p24_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_4096x2160p24_16_9);

		break;

	case HDMI_VFRMT_1024x768p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1024x768p60_4_3);

		break;

	case HDMI_VFRMT_1280x1024p60_5_4:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x1024p60_5_4);

		break;

	case HDMI_VFRMT_2560x1600p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_2560x1600p60_16_9);

		break;

	case HDMI_VFRMT_800x600p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_800x600p60_4_3);

		break;

	case HDMI_VFRMT_848x480p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_848x480p60_16_9);

		break;

	case HDMI_VFRMT_1280x960p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x960p60_4_3);

		break;

	case HDMI_VFRMT_1360x768p60_16_9:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1360x768p60_16_9);

		break;

	case HDMI_VFRMT_1440x900p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1440x900p60_16_10);

		break;

	case HDMI_VFRMT_1400x1050p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1400x1050p60_4_3);

		break;

	case HDMI_VFRMT_1680x1050p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1680x1050p60_16_10);

		break;

	case HDMI_VFRMT_1600x1200p60_4_3:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1600x1200p60_4_3);

		break;

	case HDMI_VFRMT_1920x1200p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1200p60_16_10);

		break;

	case HDMI_VFRMT_1366x768p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1366x768p60_16_10);

		break;

	case HDMI_VFRMT_1280x800p60_16_10:

		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x800p60_16_10);

		break;

	default:

		ret = -EINVAL;

	}



	return ret;

}

#endif /* _UAPI_MSM_HDMI_MODES_H__ */