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Commit 37308c44 authored by Yan He's avatar Yan He
Browse files

msm: pcie: support PCIe enumeration via wake IRQ 



Some PCIe endpoint will fail the PCIe enumeration during AP side
bootup, and will trigger wake IRQ to AP side when it is up. Thus,
add the support for this kind of enumeration via wake IRQ only.

CRs-fixed: 660202
Change-Id: I643d5e73bbbe5b7574047172206afb4f20d68a3c
Signed-off-by: default avatarYan He <yanhe@codeaurora.org>
parent 9e91c0c5

Documentation/devicetree/bindings/pci/msm_pcie.txt

+3 −0
Original line number Diff line number Diff line
@@ -50,6 +50,8 @@ Optional Properties: 
    support L1ss.

  - qcom,n-fts: The number of fast training sequences sent when the link state

    is changed from L0s to L0.

  - qcom,ep-wakeirq: The endpoint will issue wake signal when it is up, and the

    root complex has the capability to enumerate the endpoint for this case.

  - qcom,msi-gicm-addr: MSI address for GICv2m.

  - qcom,msi-gicm-base: MSI IRQ base for GICv2m.

  - qcom,ext-ref-clk: The reference clock is external.
@@ -121,6 +123,7 @@ Example: 
		qcom,l1ss-supported;

		qcom,aux-clk-sync;

		qcom,n-fts = <0x50>;

		qcom,ep-wakeirq;

		qcom,msi-gicm-addr = <0xf9040040>;

		qcom,msi-gicm-base = <0x160>;

		qcom,ext-ref-clk;

arch/arm/mach-msm/pcie.c

+15 −0
Original line number Diff line number Diff line
@@ -1504,6 +1504,13 @@ static int msm_pcie_probe(struct platform_device *pdev) 
		"AUX clock is %s synchronous to Core clock.\n",

		msm_pcie_dev[rc_idx].aux_clk_sync ? "" : "not");



	msm_pcie_dev[rc_idx].ep_wakeirq =

		of_property_read_bool((&pdev->dev)->of_node,

				"qcom,ep-wakeirq");

	PCIE_DBG(&msm_pcie_dev[rc_idx],

		"PCIe: EP of RC%d does %s assert wake when it is up.\n",

		rc_idx, msm_pcie_dev[rc_idx].ep_wakeirq ? "" : "not");



	msm_pcie_dev[rc_idx].n_fts = 0;

	ret = of_property_read_u32((&pdev->dev)->of_node,

				"qcom,n-fts",
@@ -1615,6 +1622,14 @@ static int msm_pcie_probe(struct platform_device *pdev) 
		goto decrease_rc_num;

	}



	if (msm_pcie_dev[rc_idx].ep_wakeirq) {

		PCIE_DBG(&msm_pcie_dev[rc_idx],

			"PCIe: RC%d will be enumerated upon WAKE signal from Endpoint.\n",

			rc_idx);

		mutex_unlock(&pcie_drv.drv_lock);

		return 0;

	}



	ret = msm_pcie_enumerate(rc_idx);



	if (ret)

arch/arm/mach-msm/pcie.h

+1 −0
Original line number Diff line number Diff line
@@ -210,6 +210,7 @@ struct msm_pcie_dev_t { 
	uint32_t                     n_fts;

	bool                         ext_ref_clk;

	uint32_t                     ep_latency;

	bool                         ep_wakeirq;



	uint32_t                     rc_idx;

	bool                         enumerated;