Loading drivers/video/msm/mdss/mdss_hdmi_hdcp.c +5 −5 Original line number Diff line number Diff line Loading @@ -186,11 +186,11 @@ static void hdmi_hdcp_hw_ddc_clean(struct hdmi_hdcp_ctrl *hdcp_ctrl) do { hdcp_ddc_status = DSS_REG_R(io, HDMI_HDCP_DDC_STATUS); ddc_hw_status = DSS_REG_R(io, HDMI_DDC_HW_STATUS); ddc_xfer_done = (hdcp_ddc_status & BIT(10)) ; ddc_xfer_req = (hdcp_ddc_status & BIT(4)) ; ddc_hw_done = (ddc_hw_status & BIT(3)) ; ddc_hw_not_ready = ((ddc_xfer_done != 1) || (ddc_xfer_req != 0) || (ddc_hw_done != 1)); ddc_xfer_done = hdcp_ddc_status & BIT(10); ddc_xfer_req = hdcp_ddc_status & BIT(4); ddc_hw_done = ddc_hw_status & BIT(3); ddc_hw_not_ready = !ddc_xfer_done || ddc_xfer_req || !ddc_hw_done; DEV_DBG("%s: %s: timeout count(%d):ddc hw%sready\n", __func__, HDCP_STATE_NAME, timeout_count, Loading Loading
drivers/video/msm/mdss/mdss_hdmi_hdcp.c +5 −5 Original line number Diff line number Diff line Loading @@ -186,11 +186,11 @@ static void hdmi_hdcp_hw_ddc_clean(struct hdmi_hdcp_ctrl *hdcp_ctrl) do { hdcp_ddc_status = DSS_REG_R(io, HDMI_HDCP_DDC_STATUS); ddc_hw_status = DSS_REG_R(io, HDMI_DDC_HW_STATUS); ddc_xfer_done = (hdcp_ddc_status & BIT(10)) ; ddc_xfer_req = (hdcp_ddc_status & BIT(4)) ; ddc_hw_done = (ddc_hw_status & BIT(3)) ; ddc_hw_not_ready = ((ddc_xfer_done != 1) || (ddc_xfer_req != 0) || (ddc_hw_done != 1)); ddc_xfer_done = hdcp_ddc_status & BIT(10); ddc_xfer_req = hdcp_ddc_status & BIT(4); ddc_hw_done = ddc_hw_status & BIT(3); ddc_hw_not_ready = !ddc_xfer_done || ddc_xfer_req || !ddc_hw_done; DEV_DBG("%s: %s: timeout count(%d):ddc hw%sready\n", __func__, HDCP_STATE_NAME, timeout_count, Loading