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Commit 35faa55c authored by Sebastian Andrzej Siewior's avatar Sebastian Andrzej Siewior Committed by Grant Likely
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spi/fsl-espi: make the clock computation easier to read



The -1 +1 thingy should probably do what DIV_ROUND_UP does. The 4 is 2
the  "platform_clock => sysclock" and 2 from the computation part. The 64
is the same 4 times 16.

Signed-off-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
parent bb9c5687
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+2 −2
Original line number Original line Diff line number Diff line
@@ -180,7 +180,7 @@ static int fsl_espi_setup_transfer(struct spi_device *spi,


	if ((mpc8xxx_spi->spibrg / hz) > 64) {
	if ((mpc8xxx_spi->spibrg / hz) > 64) {
		cs->hw_mode |= CSMODE_DIV16;
		cs->hw_mode |= CSMODE_DIV16;
		pm = (mpc8xxx_spi->spibrg - 1) / (hz * 64) + 1;
		pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 16 * 4);


		WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. "
		WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. "
			  "Will use %d Hz instead.\n", dev_name(&spi->dev),
			  "Will use %d Hz instead.\n", dev_name(&spi->dev),
@@ -188,7 +188,7 @@ static int fsl_espi_setup_transfer(struct spi_device *spi,
		if (pm > 16)
		if (pm > 16)
			pm = 16;
			pm = 16;
	} else {
	} else {
		pm = (mpc8xxx_spi->spibrg - 1) / (hz * 4) + 1;
		pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 4);
	}
	}
	if (pm)
	if (pm)
		pm--;
		pm--;