Loading arch/arm/boot/dts/qcom/msm8994-pinctrl.dtsi +0 −17 Original line number Diff line number Diff line Loading @@ -221,23 +221,6 @@ }; }; pmx_i2c_4 { qcom,pins = <&gp 19>, <&gp 20>; qcom,num-grp-pins = <2>; qcom,pin-func = <4>; label = "pmx_i2c_4"; i2c_4_active: i2c_4_active { drive-strength = <2>; bias-disable; }; i2c_4_sleep: i2c_4_sleep { drive-strength = <2>; bias-disable; }; }; pmx_i2c_5 { qcom,pins = <&gp 83>, <&gp 84>; /* SDA, SCL */ qcom,num-grp-pins = <2>; Loading arch/arm/boot/dts/qcom/msm8994.dtsi +0 −26 Original line number Diff line number Diff line Loading @@ -23,7 +23,6 @@ sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ sdhc2 = &sdhc_2; /* SDC2 SD card slot */ i2c6 = &i2c_6; /* I2C6 NFC qup6 device */ i2c4 = &i2c_4; i2c2 = &i2c_2; i2c5 = &i2c_5; spi0 = &spi_0; Loading Loading @@ -1977,31 +1976,6 @@ qcom,master-id = <86>; }; i2c_4: i2c@f9926000 { /* BLSP1 QUP4 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9926000 0x1000>, <0xf9904000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 98 0>, <0 238 0>; qcom,clk-freq-out = <100000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, <&clock_gcc clk_gcc_blsp1_qup4_i2c_apps_clk>; pinctrl-names = "i2c_active", "i2c_sleep"; pinctrl-0 = <&i2c_4_active>; pinctrl-1 = <&i2c_4_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <18>; qcom,bam-pipe-idx-prod = <19>; qcom,master-id = <86>; }; i2c_5: i2c@f9967000 { /* BLSP2 QUP5 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; Loading Loading
arch/arm/boot/dts/qcom/msm8994-pinctrl.dtsi +0 −17 Original line number Diff line number Diff line Loading @@ -221,23 +221,6 @@ }; }; pmx_i2c_4 { qcom,pins = <&gp 19>, <&gp 20>; qcom,num-grp-pins = <2>; qcom,pin-func = <4>; label = "pmx_i2c_4"; i2c_4_active: i2c_4_active { drive-strength = <2>; bias-disable; }; i2c_4_sleep: i2c_4_sleep { drive-strength = <2>; bias-disable; }; }; pmx_i2c_5 { qcom,pins = <&gp 83>, <&gp 84>; /* SDA, SCL */ qcom,num-grp-pins = <2>; Loading
arch/arm/boot/dts/qcom/msm8994.dtsi +0 −26 Original line number Diff line number Diff line Loading @@ -23,7 +23,6 @@ sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ sdhc2 = &sdhc_2; /* SDC2 SD card slot */ i2c6 = &i2c_6; /* I2C6 NFC qup6 device */ i2c4 = &i2c_4; i2c2 = &i2c_2; i2c5 = &i2c_5; spi0 = &spi_0; Loading Loading @@ -1977,31 +1976,6 @@ qcom,master-id = <86>; }; i2c_4: i2c@f9926000 { /* BLSP1 QUP4 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; #size-cells = <0>; reg-names = "qup_phys_addr", "bam_phys_addr"; reg = <0xf9926000 0x1000>, <0xf9904000 0x19000>; interrupt-names = "qup_irq", "bam_irq"; interrupts = <0 98 0>, <0 238 0>; qcom,clk-freq-out = <100000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, <&clock_gcc clk_gcc_blsp1_qup4_i2c_apps_clk>; pinctrl-names = "i2c_active", "i2c_sleep"; pinctrl-0 = <&i2c_4_active>; pinctrl-1 = <&i2c_4_sleep>; qcom,noise-rjct-scl = <0>; qcom,noise-rjct-sda = <0>; qcom,bam-pipe-idx-cons = <18>; qcom,bam-pipe-idx-prod = <19>; qcom,master-id = <86>; }; i2c_5: i2c@f9967000 { /* BLSP2 QUP5 */ compatible = "qcom,i2c-msm-v2"; #address-cells = <1>; Loading