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Commit 3323e36d authored by Subbaraman Narayanamurthy's avatar Subbaraman Narayanamurthy
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power: qpnp-fg: Add support to control the SW based Rbias 



Commit 511c34bf
(power: qpnp-fg: Configure SW based Rbias and manage it) added
the support to configure SW based Rbias. However it enables that
feature by default which is not required for some boards. Add a
boolean property to select the feature on need basis.

CRs-Fixed: 743954
Change-Id: Id96d7c06ef4654a088f0ec256d25f98ff6165fb6
Signed-off-by: default avatarSubbaraman Narayanamurthy <subbaram@codeaurora.org>
parent 57aa6888

Documentation/devicetree/bindings/power/qpnp-fg.txt

+4 −0
Original line number Diff line number Diff line
@@ -41,6 +41,10 @@ Parent node optional properties: 
					Example: [01 02 03 04 05 06]

- qcom,use-otp-profile:			Specify this flag to avoid RAM loading

					any battery profile.

- qcom,sw-rbias-control:		Boolean property which defines whether

					the Rbias needs to be controlled by

					software. If this is not set, it will

					be controlled by hardware (default).



qcom,fg-soc node required properties:

- reg : offset and length of the PMIC peripheral register map.

drivers/power/qpnp-fg.c

+28 −16
Original line number Diff line number Diff line
@@ -231,6 +231,7 @@ struct fg_chip { 
	bool			use_otp_profile;

	bool			battery_missing;

	bool			power_supply_registered;

	bool			sw_rbias_ctrl;

	struct delayed_work	update_jeita_setting;

	struct delayed_work	update_sram_data;

	char			*batt_profile;
@@ -1621,6 +1622,8 @@ static int fg_of_init(struct fg_chip *chip) 
		rc = 0;

	}



	chip->sw_rbias_ctrl = of_property_read_bool(chip->spmi->dev.of_node,

				"qcom,sw-rbias-control");

	return rc;

}
@@ -2224,6 +2227,7 @@ static int fg_hw_init(struct fg_chip *chip) 
		}

	}



	if (chip->sw_rbias_ctrl) {

		rc = fg_mem_masked_write(chip, EXTERNAL_SENSE_SELECT,

				BATT_TEMP_CNTRL_MASK,

				BATT_TEMP_ON,
@@ -2241,6 +2245,7 @@ static int fg_hw_init(struct fg_chip *chip) 
			pr_err("failed to write to memif rc=%d\n", rc);

			return rc;

		}

	}



	if (chip->use_thermal_coefficients) {

		fg_mem_write(chip, chip->thermal_coefficients,
@@ -2431,6 +2436,9 @@ static int fg_suspend(struct device *dev) 
	int total_time_ms;

	int rc;



	if (!chip->sw_rbias_ctrl)

		return 0;



	enter_time = ktime_get();

	rc = fg_mem_masked_write(chip, EXTERNAL_SENSE_SELECT,

			BATT_TEMP_CNTRL_MASK,
@@ -2443,7 +2451,8 @@ static int fg_suspend(struct device *dev) 
	total_time_ms = ktime_to_ms(total_time);



	if ((total_time_ms > 1500) && (fg_debug_mask & FG_STATUS))

		pr_info("spent %dms configuring rbias\n", total_time_ms);

		pr_info("spent %dms configuring rbias\n",

			total_time_ms);



	return 0;

}
@@ -2457,6 +2466,9 @@ static int fg_resume(struct device *dev) 
	unsigned long current_time = 0, next_update_time, time_left;

	int rc;



	if (!chip->sw_rbias_ctrl)

		return 0;



	enter_time = ktime_get();

	rc = fg_mem_masked_write(chip, EXTERNAL_SENSE_SELECT,

			BATT_TEMP_CNTRL_MASK,