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Commit 31c4ab43 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Workaround for a sparse warning in include/asm-mips/mach-tx4927/ioremap.h
  [MIPS] Make show_code static and add __user tag
  [MIPS] Workaround for a sparse warning in include/asm-mips/compat.h
  [MIPS] Add some __user tags
  [MIPS] math-emu minor cleanup
  [MIPS] Kill CONFIG_TX4927BUG_WORKAROUND
  [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_FB_XPERT98
  [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1000_SRC_CLK
  [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1000_USE32K
  [MIPS] Alchemy: Remove code wrapped by dead symbol CONFIG_AU1XXX_PSC_SPI
  [CHAR] Delete leftovers of old Alchemy UART driver
parents 8b69ad0e f24ae12b

arch/mips/au1000/common/setup.c

+0 −6
Original line number Diff line number Diff line
@@ -103,12 +103,6 @@ void __init plat_mem_setup(void) 
    }

#endif



#ifdef CONFIG_FB_XPERT98

	if ((argptr = strstr(argptr, "video=")) == NULL) {

		argptr = prom_getcmdline();

		strcat(argptr, " video=atyfb:1024x768-8@70");

	}

#endif



#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)

	/* au1000 does not support vra, au1500 and au1100 do */

arch/mips/au1000/common/time.c

+0 −29
Original line number Diff line number Diff line
@@ -203,11 +203,7 @@ wakeup_counter0_set(int ticks) 
/* I haven't found anyone that doesn't use a 12 MHz source clock,

 * but just in case.....

 */

#ifdef CONFIG_AU1000_SRC_CLK

#define AU1000_SRC_CLK	CONFIG_AU1000_SRC_CLK

#else

#define AU1000_SRC_CLK	12000000

#endif



/*

 * We read the real processor speed from the PLL.  This is important
@@ -247,33 +243,8 @@ unsigned long cal_r4koff(void) 
		au_writel (0, SYS_TOYWRITE);

		while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);



#if defined(CONFIG_AU1000_USE32K)

		{

			unsigned long start, end, count;



			start = au_readl(SYS_RTCREAD);

			start += 2;

			/* wait for the beginning of a new tick

			*/

			while (au_readl(SYS_RTCREAD) < start);



			/* Start r4k counter.

			*/

			write_c0_count(0);



			/* Wait 0.5 seconds.

			*/

			end = start + (32768 / trim_divide)/2;



			while (end > au_readl(SYS_RTCREAD));



			count = read_c0_count();

			cpu_speed = count * 2;

		}

#else

		cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) *

			AU1000_SRC_CLK;

#endif

	}

	else {

		/* The 32KHz oscillator isn't running, so assume there

arch/mips/au1000/pb1200/board_setup.c

+1 −8
Original line number Diff line number Diff line
@@ -131,14 +131,7 @@ void __init board_setup(void) 
	/* The Pb1200 development board uses external MUX for PSC0 to

	support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI

	*/

#if defined(CONFIG_AU1XXX_PSC_SPI) && defined(CONFIG_I2C_AU1550)

	#error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\

			Refer to Pb1200/Db1200 documentation.

#elif defined( CONFIG_AU1XXX_PSC_SPI )

	bcsr->resets |= BCSR_RESETS_PCS0MUX;

	/*Hard Coding Value to enable Temp Sensors [bit 14] Value for SOC Au1200. Pls refer documentation*/

	  bcsr->resets =0x900f;

#elif defined( CONFIG_I2C_AU1550 )

#ifdef CONFIG_I2C_AU1550

	bcsr->resets &= (~BCSR_RESETS_PCS0MUX);

#endif

	au_sync();

arch/mips/kernel/branch.c

+3 −2
Original line number Diff line number Diff line
@@ -22,7 +22,8 @@ 
 */

int __compute_return_epc(struct pt_regs *regs)

{

	unsigned int *addr, bit, fcr31, dspcontrol;

	unsigned int __user *addr;

	unsigned int bit, fcr31, dspcontrol;

	long epc;

	union mips_instruction insn;
@@ -33,7 +34,7 @@ int __compute_return_epc(struct pt_regs *regs) 
	/*

	 * Read the instruction

	 */

	addr = (unsigned int *) epc;

	addr = (unsigned int __user *) epc;

	if (__get_user(insn.word, addr)) {

		force_sig(SIGSEGV, current);

		return -EFAULT;

arch/mips/kernel/traps.c

+4 −4
Original line number Diff line number Diff line
@@ -131,7 +131,7 @@ static void show_stacktrace(struct task_struct *task, struct pt_regs *regs) 
	const int field = 2 * sizeof(unsigned long);

	long stackdata;

	int i;

	unsigned long *sp = (unsigned long *)regs->regs[29];

	unsigned long __user *sp = (unsigned long __user *)regs->regs[29];



	printk("Stack :");

	i = 0;
@@ -187,7 +187,7 @@ void dump_stack(void) 


EXPORT_SYMBOL(dump_stack);



void show_code(unsigned int *pc)

static void show_code(unsigned int __user *pc)

{

	long i;
@@ -305,7 +305,7 @@ void show_registers(struct pt_regs *regs) 
	printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n",

	        current->comm, current->pid, current_thread_info(), current);

	show_stacktrace(current, regs);

	show_code((unsigned int *) regs->cp0_epc);

	show_code((unsigned int __user *) regs->cp0_epc);

	printk("\n");

}
@@ -865,7 +865,7 @@ asmlinkage void do_mcheck(struct pt_regs *regs) 
		dump_tlb_all();

	}



	show_code((unsigned int *) regs->cp0_epc);

	show_code((unsigned int __user *) regs->cp0_epc);



	/*

	 * Some chips may have other causes of machine check (e.g. SB1