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Commit 30e4abe7 authored by Patrick Daly's avatar Patrick Daly
Browse files

ARM: dts: msm: Move parameters to device tree for 8226 



Add parameters for the clock-a7 device.

Change-Id: I94a9620b46bcbe30bd277f0213b176ccb9cbe509
Signed-off-by: default avatarPatrick Daly <pdaly@codeaurora.org>
parent 72222c72

arch/arm/boot/dts/msm8226-v1-pm.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -283,6 +283,8 @@ 
		qcom,pc-mode = "tz_l2_int";

		qcom,use-sync-timer;

		qcom,pc-resets-timer;

		qcom,cpus-as-clocks;

		qcom,synced-clocks;

	};



	qcom,cpu-sleep-status@f9088008{

arch/arm/boot/dts/msm8226-v2-pm.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -295,6 +295,8 @@ 
		qcom,pc-mode = "tz_l2_int";

		qcom,use-sync-timer;

		qcom,pc-resets-timer;

		qcom,cpus-as-clocks;

		qcom,synced-clocks;

	};



	qcom,cpu-sleep-status@f9088008{

arch/arm/boot/dts/msm8226-v2.dtsi

+37 −2
Original line number Diff line number Diff line
@@ -74,10 +74,45 @@ 
};



&soc {

	qcom,acpuclk@f9011050 {

	qcom,clock-a7@f9011050 {

		reg =	<0xf9011050 0x8>,

			<0xfc4b80b0 0x8>;

		reg-names = "rcg_base", "pte_efuse";

		reg-names = "rcg-base", "efuse";

		qcom,speed0-bin-v2 =

			<         0 0>,

			< 384000000 1>,

			< 787200000 2>,

			<1190400000 3>;

		qcom,speed6-bin-v2 =

			<         0 0>,

			< 384000000 1>,

			< 787200000 2>,

			<1190400000 3>;

		qcom,speed2-bin-v2 =

			<         0 0>,

			< 384000000 1>,

			< 787200000 2>,

			<1401600000 3>;

		qcom,speed5-bin-v2 =

			<         0 0>,

			< 384000000 1>,

			< 787200000 2>,

			<1401600000 3>;

		qcom,speed4-bin-v2 =

			<         0 0>,

			< 384000000 1>,

			< 787200000 2>,

			<149700000 3>;

		qcom,speed7-bin-v2 =

			<         0 0>,

			< 384000000 1>,

			< 787200000 2>,

			<1497600000 3>;

		qcom,speed1-bin-v2 =

			<         0 0>,

			< 384000000 1>,

			< 787200000 2>,

			<1593600000 3>;

	};

};

arch/arm/boot/dts/msm8226.dtsi

+30 −4
Original line number Diff line number Diff line
@@ -981,11 +981,37 @@ 
		qcom,scl-gpio = <&msmgpio 19 0>;

	};



	qcom,acpuclk@f9011050 {

		compatible = "qcom,acpuclk-a7";

	qcom,clock-a7@f9011050 {

		compatible = "qcom,clock-a7-8226";

		reg = <0xf9011050 0x8>;

		reg-names = "rcg_base";

		a7_cpu-supply = <&apc_vreg_corner>;

		reg-names = "rcg-base";

		clock-names = "clk-4", "clk-5";

		qcom,speed0-bin-v0 =

			<         0 0>,

			< 384000000 1>,

			< 787200000 2>,

			<1190400000 3>;



		cpu-vdd-supply = <&apc_vreg_corner>;

	};



	qcom,msm-cpufreq@0 {

		reg = <0 4>;

		compatible = "qcom,msm-cpufreq";

		qcom,cpu-mem-ports = <1 512>;

		qcom,cpufreq-table =

			<  300000 1600 /* 200 MHz */ >,

			<  384000 1600 /* 200 MHz */ >,

			<  600000 3200 /* 320 MHz */ >,

			<  787200 4264 /* 533 MHz */ >,

			<  998400 4264 /* 533 MHz */ >,

			< 1094400 4264 /* 533 MHz */ >,

			< 1190400 4264 /* 533 MHz */ >,

			< 1305600 4264 /* 533 MHz */ >,

			< 1344000 4264 /* 533 MHz */ >,

			< 1401600 4264 /* 533 MHz */ >,

			< 1497600 4264 /* 533 MHz */ >,

			< 1593600 4264 /* 533 MHz */ >;

	};



	qcom,ocmem@fdd00000 {