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Commit 30a9c4d9 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "Arm: dts: msm: camera: add clk settings for csid/csiphy in dtsi"

parents 56ee550b 9bd045fa

Documentation/devicetree/bindings/media/video/msm-csi-phy.txt

+13 −1
Original line number Diff line number Diff line
@@ -4,20 +4,32 @@ Required properties: 
- cell-index: csi phy hardware core index

- compatible :

    - "qcom,csiphy"

    - "qcom,csiphy-v2.0"

    - "qcom,csiphy-v2.2"

    - "qcom,csiphy-v3.0"

    - "qcom,csiphy-v3.1"

    - "qcom,csiphy-v3.2"

- reg : offset and length of the register set for the device

    for the csiphy operating in compatible mode.

- reg-names : should specify relevant names to each reg property defined.

- interrupts : should contain the csiphy interrupt.

- interrupt-names : should specify relevant names to each interrupts

  property defined.

- qcom,clock-names: name of the clocks required for the device

- qcom,clock-rates: clock rate in Hz

	- 0 if appropriate clock is required but doesn't have to apply the rate



Example:



   qcom,csiphy@fda0ac00 {

       cell-index = <0>;

       compatible = "qcom,csiphy";

       compatible = "qcom,csiphy-v2.0", "qcom,csiphy";

       reg = <0xfda0ac00 0x200>;

       reg-names = "csiphy";

       interrupts = <0 78 0>;

       interrupt-names = "csiphy";

       qcom,clock-names = "camss_top_ahb_clk",

                "ispif_ahb_clk", "csiphy_timer_src_clk",

                "csiphy_timer_clk";

       qcom,clock-rates = <0 0 200000000 0>;

   };

Documentation/devicetree/bindings/media/video/msm-csid.txt

+14 −1
Original line number Diff line number Diff line
@@ -4,6 +4,12 @@ Required properties: 
- cell-index: csid hardware core index

- compatible :

    - "qcom,csid"

    - "qcom,csid-v2.0"

    - "qcom,csid-v2.2"

    - "qcom,csid-v3.0"

    - "qcom,csid-v3.1"

    - "qcom,csid-v3.2"

    - "qcom,csid-v4.0"

- reg : offset and length of the register set for the device

    for the csid operating in compatible mode.

- reg-names : should specify relevant names to each reg property defined.
@@ -14,16 +20,23 @@ Required properties: 
    for mipi csi in uV.

- qcom,mipi-csi-vdd-supply : should contain regulator to be used for

    this csid core

- qcom,clock-names: name of the clocks required for the device

- qcom,clock-rates: clock rate in Hz

	- 0 if appropriate clock is required but doesn't have to apply the rate



Example:



   qcom,csid@fda08000 {

       cell-index = <0>;

       compatible = "qcom,csid";

       compatible = "qcom,csid-v2.0", "qcom,csid";

       reg = <0xfda08000 0x200>;

       reg-names = "csid";

       interrupts = <0 51 0>;

       interrupt-names = "csiphy";

       qcom,csi-vdd-voltage = <1800000>;

       qcom,mipi-csi-vdd-supply = <&pm8941_l12>;

       qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk",

                "csi_ahb_clk", "csi_src_clk", "csi_clk",

                "csi_phy_clk", "csi_pix_clk", "csi_rdi_clk";

       qcom,clock-rates = <0 0 0 200000000 0 0 0 0>;

   };

arch/arm/boot/dts/qcom/apq8084-camera.dtsi

+39 −7
Original line number Diff line number Diff line
@@ -20,76 +20,108 @@ 


	qcom,csiphy@fda0ac00 {

		cell-index = <0>;

		compatible = "qcom,csiphy";

		compatible = "qcom,csiphy-v3.1", "qcom,csiphy";

		reg = <0xfda0ac00 0x200>,

                      <0xfda00030 0x4>;

		reg-names = "csiphy", "csiphy_clk_mux";

		interrupts = <0 78 0>;

		interrupt-names = "csiphy";

		qcom,clock-names = "camss_top_ahb_clk",

			"camss_ahb_clk", "ispif_ahb_clk",

			"csiphy_timer_src_clk", "csiphy_timer_clk";

		qcom,clock-rates = <0 0 0 200000000 0>;

	};



	qcom,csiphy@fda0b000 {

		cell-index = <1>;

		compatible = "qcom,csiphy";

		compatible = "qcom,csiphy-v3.1", "qcom,csiphy";

		reg = <0xfda0b000 0x200>,

                      <0xfda00038 0x4>;

		reg-names = "csiphy", "csiphy_clk_mux";

		interrupts = <0 79 0>;

		interrupt-names = "csiphy";

		qcom,clock-names = "camss_top_ahb_clk",

			"camss_ahb_clk", "ispif_ahb_clk",

			"csiphy_timer_src_clk", "csiphy_timer_clk";

		qcom,clock-rates = <0 0 0 200000000 0>;

	};



	qcom,csiphy@fda0b400 {

		cell-index = <2>;

		compatible = "qcom,csiphy";

		compatible = "qcom,csiphy-v3.1", "qcom,csiphy";

		reg = <0xfda0b400 0x200>,

                      <0xfda00040 0x4>;

		reg-names = "csiphy", "csiphy_clk_mux";

		interrupts = <0 80 0>;

		interrupt-names = "csiphy";

		qcom,clock-names = "camss_top_ahb_clk",

			"camss_ahb_clk", "ispif_ahb_clk",

			"csiphy_timer_src_clk", "csiphy_timer_clk";

		qcom,clock-rates = <0 0 0 200000000 0>;

	};



	qcom,csid@fda08000  {

		cell-index = <0>;

		compatible = "qcom,csid";

		compatible = "qcom,csid-v3.1", "qcom,csid";

		reg = <0xfda08000 0x100>;

		reg-names = "csid";

		interrupts = <0 51 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1800000>;

		qcom,mipi-csi-vdd-supply = <&pma8084_l12>;

		qcom,clock-names = "camss_top_ahb_clk", "camss_ahb_clk",

			"ispif_ahb_clk", "csi_ahb_clk",

			"csi_src_clk", "csi_clk", "csi_phy_clk",

			"csi_pix_clk", "csi_rdi_clk";

		qcom,clock-rates = <0 0 0 0 200000000 0 0 0 0>;

	};



	qcom,csid@fda08400 {

		cell-index = <1>;

		compatible = "qcom,csid";

		compatible = "qcom,csid-v3.1", "qcom,csid";

		reg = <0xfda08400 0x100>;

		reg-names = "csid";

		interrupts = <0 52 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1800000>;

		qcom,mipi-csi-vdd-supply = <&pma8084_l12>;

		qcom,clock-names = "camss_top_ahb_clk", "camss_ahb_clk",

			"ispif_ahb_clk", "csi_ahb_clk",

			"csi_src_clk", "csi_clk", "csi_phy_clk",

			"csi_pix_clk", "csi_rdi_clk";

		qcom,clock-rates = <0 0 0 0 200000000 0 0 0 0>;

	};



	qcom,csid@fda08800 {

		cell-index = <2>;

		compatible = "qcom,csid";

		compatible = "qcom,csid-v3.1", "qcom,csid";

		reg = <0xfda08800 0x100>;

		reg-names = "csid";

		interrupts = <0 53 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1800000>;

		qcom,mipi-csi-vdd-supply = <&pma8084_l12>;

		qcom,clock-names = "camss_top_ahb_clk", "camss_ahb_clk",

			"ispif_ahb_clk", "csi_ahb_clk",

			"csi_src_clk", "csi_clk", "csi_phy_clk",

			"csi_pix_clk", "csi_rdi_clk";

		qcom,clock-rates = <0 0 0 0 200000000 0 0 0 0>;

	};



	qcom,csid@fda08C00 {

		cell-index = <3>;

		compatible = "qcom,csid";

		compatible = "qcom,csid-v3.1", "qcom,csid";

		reg = <0xfda08C00 0x100>;

		reg-names = "csid";

		interrupts = <0 54 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1800000>;

		qcom,mipi-csi-vdd-supply = <&pma8084_l12>;

		qcom,clock-names = "camss_top_ahb_clk", "camss_ahb_clk",

			"ispif_ahb_clk", "csi_ahb_clk",

			"csi_src_clk", "csi_clk", "csi_phy_clk",

			"csi_pix_clk", "csi_rdi_clk";

		qcom,clock-rates = <0 0 0 0 200000000 0 0 0 0>;

	};



	qcom,ispif@fda0A000 {

arch/arm/boot/dts/qcom/msm8226-camera.dtsi

+20 −4
Original line number Diff line number Diff line
@@ -20,44 +20,60 @@ 


	qcom,csiphy@fda0ac00 {

		cell-index = <0>;

		compatible = "qcom,csiphy";

		compatible = "qcom,csiphy-v3.0", "qcom,csiphy";

		reg = <0xfda0ac00 0x200>,

			<0xfda00030 0x4>;

		reg-names = "csiphy", "csiphy_clk_mux";

		interrupts = <0 78 0>;

		interrupt-names = "csiphy";

		qcom,clock-names = "camss_top_ahb_clk",

			"ispif_ahb_clk", "csiphy_timer_src_clk",

			"csiphy_timer_clk";

		qcom,clock-rates = <0 0 200000000 0>;

	};



	qcom,csiphy@fda0b000 {

		cell-index = <1>;

		compatible = "qcom,csiphy";

		compatible = "qcom,csiphy-v3.0", "qcom,csiphy";

		reg = <0xfda0b000 0x200>,

			<0xfda00038 0x4>;

		reg-names = "csiphy", "csiphy_clk_mux";

		interrupts = <0 79 0>;

		interrupt-names = "csiphy";

		qcom,clock-names = "camss_top_ahb_clk",

			"ispif_ahb_clk", "csiphy_timer_src_clk",

			"csiphy_timer_clk";

		qcom,clock-rates = <0 0 200000000 0>;

	};



	qcom,csid@fda08000  {

		cell-index = <0>;

		compatible = "qcom,csid";

		compatible = "qcom,csid-v4.0", "qcom,csid";

		reg = <0xfda08000 0x100>;

		reg-names = "csid";

		interrupts = <0 51 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1200000>;

		qcom,mipi-csi-vdd-supply = <&pm8226_l4>;

		qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk",

			"csi_ahb_clk", "csi_src_clk", "csi_clk",

			"csi_phy_clk", "csi_pix_clk", "csi_rdi_clk";

		qcom,clock-rates = <0 0 0 200000000 0 0 0 0>;

	};



	qcom,csid@fda08400 {

		cell-index = <1>;

		compatible = "qcom,csid";

		compatible = "qcom,csid-v4.0", "qcom,csid";

		reg = <0xfda08400 0x100>;

		reg-names = "csid";

		interrupts = <0 52 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1200000>;

		qcom,mipi-csi-vdd-supply = <&pm8226_l4>;

		qcom,clock-names = "camss_top_ahb_clk", "ispif_ahb_clk",

			"csi_ahb_clk", "csi_src_clk", "csi_clk",

			"csi_phy_clk", "csi_pix_clk", "csi_rdi_clk";

		qcom,clock-rates = <0 0 0 200000000 0 0 0 0>;

	};



	qcom,ispif@fda0a000 {

arch/arm/boot/dts/qcom/msm8610-camera.dtsi

+27 −5
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2013, The Linux Foundation. All rights reserved.

 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -20,42 +20,64 @@ 


	qcom,csiphy@fda00c00 {

		cell-index = <0>;

		compatible = "qcom,csiphy";

		compatible = "qcom,csiphy-v2.2", "qcom,csiphy";

		reg = <0xfda00c00 0x1f4>;

		reg-names = "csiphy";

		interrupts = <0 78 0>;

		interrupt-names = "csiphy";

		qcom,clock-names = "csiphy_timer_src_clk",

			"csiphy_timer_clk", "csi_ahb_clk";

		qcom,clock-rates = <200000000 0 0>;

	};



	qcom,csiphy@fda01000 {

		cell-index = <1>;

		compatible = "qcom,csiphy";

		compatible = "qcom,csiphy-v2.2", "qcom,csiphy";

		reg = <0xfda01000 0x1f4>;

		reg-names = "csiphy";

		interrupts = <0 79 0>;

		interrupt-names = "csiphy";

		qcom,clock-names = "csiphy_timer_src_clk",

			"csiphy_timer_clk", "csi_ahb_clk";

		qcom,clock-rates = <200000000 0 0>;

	};



	qcom,csid@fda00000 {

		cell-index = <0>;

		compatible = "qcom,csid";

		compatible = "qcom,csid-v2.2", "qcom,csid";

		reg = <0xfda00000 0x100>;

		reg-names = "csid";

		interrupts = <0 50 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1200000>;

		qcom,mipi-csi-vdd-supply = <&pm8110_l4>;

		qcom,clock-names = "csi_ahb_clk", "csi_src_clk",

			"csi_clk", "csi0phy_mux_clk", "csi1phy_mux_clk",

			"csi0pix_mux_clk", "csi0rdi_mux_clk",

			"csi1rdi_mux_clk", "csi2rdi_mux_clk",

			"csi_phy_src_clk", "csi_phy_src_clk",

			"csi_pix_src_clk", "csi_rdi_src_clk",

			"csi_rdi_src_clk", "csi_rdi_src_clk";

		qcom,clock-rates = <0 200000000 0 0 0 0 0 0 0 0 0 0 0 0 0>;

	};



	qcom,csid@fda00400 {

		cell-index = <1>;

		compatible = "qcom,csid";

		compatible = "qcom,csid-v2.2", "qcom,csid";

		reg = <0xfda00400 0x100>;

		reg-names = "csid";

		interrupts = <0 51 0>;

		interrupt-names = "csid";

		qcom,csi-vdd-voltage = <1200000>;

		qcom,mipi-csi-vdd-supply = <&pm8110_l4>;

		qcom,clock-names = "csi_ahb_clk", "csi_src_clk",

			"csi_clk", "csi0phy_mux_clk", "csi1phy_mux_clk",

			"csi0pix_mux_clk", "csi0rdi_mux_clk",

			"csi1rdi_mux_clk", "csi2rdi_mux_clk",

			"csi_phy_src_clk", "csi_phy_src_clk",

			"csi_pix_src_clk", "csi_rdi_src_clk",

			"csi_rdi_src_clk", "csi_rdi_src_clk";

		qcom,clock-rates = <0 200000000 0 0 0 0 0 0 0 0 0 0 0 0 0>;

	};



	qcom,ispif@fda00800 {