Loading drivers/video/msm/mdss/mdp3.c +36 −3 Original line number Original line Diff line number Diff line Loading @@ -370,7 +370,7 @@ int mdp3_bus_scale_set_quota(int client, u64 ab_quota, u64 ib_quota) for (i = 0; i < MDP3_CLIENT_MAX; i++) { for (i = 0; i < MDP3_CLIENT_MAX; i++) { total_ab += bus_handle->ab[i]; total_ab += bus_handle->ab[i]; total_ib += bus_handle->ab[i]; total_ib += bus_handle->ib[i]; } } if ((total_ab | total_ib) == 0) { if ((total_ab | total_ib) == 0) { Loading Loading @@ -953,6 +953,35 @@ int mdp3_dynamic_clock_gating_ctrl(int enable) return rc; return rc; } } int mdp3_qos_remapper_setup(void) { int rc = 0; rc = mdp3_clk_update(MDP3_CLK_AHB, 1); rc |= mdp3_clk_update(MDP3_CLK_AXI, 1); rc |= mdp3_clk_update(MDP3_CLK_MDP_CORE, 1); if (rc) { pr_err("fail to turn on MDP core clks\n"); return rc; } /* Program MDP QOS Remapper */ MDP3_REG_WRITE(MDP3_DMA_P_QOS_REMAPPER, 0x1A9); MDP3_REG_WRITE(MDP3_DMA_P_WATERMARK_0, 0x0); MDP3_REG_WRITE(MDP3_DMA_P_WATERMARK_1, 0x0); MDP3_REG_WRITE(MDP3_DMA_P_WATERMARK_2, 0x0); MDP3_REG_WRITE(MDP3_PANIC_LUT0, 0xFFFF); MDP3_REG_WRITE(MDP3_PANIC_ROBUST_CTRL, 0x1); MDP3_REG_WRITE(MDP3_ROBUST_LUT, 0xFF00); rc = mdp3_clk_update(MDP3_CLK_AHB, 0); rc |= mdp3_clk_update(MDP3_CLK_AXI, 0); rc |= mdp3_clk_update(MDP3_CLK_MDP_CORE, 0); if (rc) pr_warn("fail to turn off MDP core clks\n"); return rc; } static int mdp3_res_init(void) static int mdp3_res_init(void) { { int rc = 0; int rc = 0; Loading Loading @@ -1718,6 +1747,7 @@ static int mdp3_continuous_splash_on(struct mdss_panel_data *pdata) struct mdss_panel_info *panel_info = &pdata->panel_info; struct mdss_panel_info *panel_info = &pdata->panel_info; struct mdp3_bus_handle_map *bus_handle; struct mdp3_bus_handle_map *bus_handle; u64 ab, ib; u64 ab, ib; u32 vtotal; int rc; int rc; pr_debug("mdp3__continuous_splash_on\n"); pr_debug("mdp3__continuous_splash_on\n"); Loading @@ -1733,10 +1763,13 @@ static int mdp3_continuous_splash_on(struct mdss_panel_data *pdata) pr_err("invalid bus handle %d\n", bus_handle->handle); pr_err("invalid bus handle %d\n", bus_handle->handle); return -EINVAL; return -EINVAL; } } vtotal = panel_info->yres + panel_info->lcdc.v_back_porch + panel_info->lcdc.v_front_porch + panel_info->lcdc.v_pulse_width; ab = panel_info->xres * panel_info->yres * 4 * 2; ab = panel_info->xres * vtotal * panel_info->bpp; ab *= panel_info->mipi.frame_rate; ab *= panel_info->mipi.frame_rate; ib = (ab * 3) / 2; ib = ab; rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, ab, ib); rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, ab, ib); bus_handle->restore_ab[MDP3_CLIENT_DMA_P] = ab; bus_handle->restore_ab[MDP3_CLIENT_DMA_P] = ab; bus_handle->restore_ib[MDP3_CLIENT_DMA_P] = ib; bus_handle->restore_ib[MDP3_CLIENT_DMA_P] = ib; Loading drivers/video/msm/mdss/mdp3.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -205,6 +205,7 @@ void mdp3_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval); uint32_t interval); int mdp3_dynamic_clock_gating_ctrl(int enable); int mdp3_dynamic_clock_gating_ctrl(int enable); int mdp3_footswitch_ctrl(int enable); int mdp3_footswitch_ctrl(int enable); int mdp3_qos_remapper_setup(void); #define MDP3_REG_WRITE(addr, val) writel_relaxed(val, mdp3_res->mdp_base + addr) #define MDP3_REG_WRITE(addr, val) writel_relaxed(val, mdp3_res->mdp_base + addr) #define MDP3_REG_READ(addr) readl_relaxed(mdp3_res->mdp_base + addr) #define MDP3_REG_READ(addr) readl_relaxed(mdp3_res->mdp_base + addr) Loading drivers/video/msm/mdss/mdp3_ctrl.c +9 −2 Original line number Original line Diff line number Diff line Loading @@ -348,13 +348,19 @@ static int mdp3_ctrl_clk_enable(struct msm_fb_data_type *mfd, int enable) static int mdp3_ctrl_res_req_bus(struct msm_fb_data_type *mfd, int status) static int mdp3_ctrl_res_req_bus(struct msm_fb_data_type *mfd, int status) { { int rc = 0; int rc = 0; u32 vtotal = 0; if (status) { if (status) { struct mdss_panel_info *panel_info = mfd->panel_info; struct mdss_panel_info *panel_info = mfd->panel_info; u64 ab = 0; u64 ab = 0; u64 ib = 0; u64 ib = 0; ab = panel_info->xres * panel_info->yres * 4 * 2; vtotal = panel_info->yres + panel_info->lcdc.v_back_porch + panel_info->lcdc.v_front_porch + panel_info->lcdc.v_pulse_width; ab = panel_info->xres * vtotal * panel_info->bpp; ab *= panel_info->mipi.frame_rate; ab *= panel_info->mipi.frame_rate; ib = (ab * 3) / 2; /* ab and ib vote should be same for honest voting */ ib = ab; rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, ab, ib); rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, ab, ib); } else { } else { rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, 0, 0); rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, 0, 0); Loading Loading @@ -599,6 +605,7 @@ static int mdp3_ctrl_on(struct msm_fb_data_type *mfd) mdp3_ctrl_notifier_register(mdp3_session, mdp3_ctrl_notifier_register(mdp3_session, &mdp3_session->mfd->mdp_sync_pt_data.notifier); &mdp3_session->mfd->mdp_sync_pt_data.notifier); mdp3_qos_remapper_setup(); /* request bus bandwidth before DSI DMA traffic */ /* request bus bandwidth before DSI DMA traffic */ rc = mdp3_ctrl_res_req_bus(mfd, 1); rc = mdp3_ctrl_res_req_bus(mfd, 1); if (rc) { if (rc) { Loading drivers/video/msm/mdss/mdp3_hwio.h +9 −0 Original line number Original line Diff line number Diff line Loading @@ -65,6 +65,15 @@ #define MDP3_REG_CGC_EN 0x0100 #define MDP3_REG_CGC_EN 0x0100 #define MDP3_VBIF_REG_FORCE_EN 0x0004 #define MDP3_VBIF_REG_FORCE_EN 0x0004 /* QOS Remapper */ #define MDP3_DMA_P_QOS_REMAPPER 0x90090 #define MDP3_DMA_P_WATERMARK_0 0x90094 #define MDP3_DMA_P_WATERMARK_1 0x90098 #define MDP3_DMA_P_WATERMARK_2 0x9009C #define MDP3_PANIC_ROBUST_CTRL 0x900A0 #define MDP3_PANIC_LUT0 0x900A4 #define MDP3_ROBUST_LUT 0x900AC /*danger safe*/ /*danger safe*/ #define MDP3_PANIC_ROBUST_CTRL 0x900A0 #define MDP3_PANIC_ROBUST_CTRL 0x900A0 Loading Loading
drivers/video/msm/mdss/mdp3.c +36 −3 Original line number Original line Diff line number Diff line Loading @@ -370,7 +370,7 @@ int mdp3_bus_scale_set_quota(int client, u64 ab_quota, u64 ib_quota) for (i = 0; i < MDP3_CLIENT_MAX; i++) { for (i = 0; i < MDP3_CLIENT_MAX; i++) { total_ab += bus_handle->ab[i]; total_ab += bus_handle->ab[i]; total_ib += bus_handle->ab[i]; total_ib += bus_handle->ib[i]; } } if ((total_ab | total_ib) == 0) { if ((total_ab | total_ib) == 0) { Loading Loading @@ -953,6 +953,35 @@ int mdp3_dynamic_clock_gating_ctrl(int enable) return rc; return rc; } } int mdp3_qos_remapper_setup(void) { int rc = 0; rc = mdp3_clk_update(MDP3_CLK_AHB, 1); rc |= mdp3_clk_update(MDP3_CLK_AXI, 1); rc |= mdp3_clk_update(MDP3_CLK_MDP_CORE, 1); if (rc) { pr_err("fail to turn on MDP core clks\n"); return rc; } /* Program MDP QOS Remapper */ MDP3_REG_WRITE(MDP3_DMA_P_QOS_REMAPPER, 0x1A9); MDP3_REG_WRITE(MDP3_DMA_P_WATERMARK_0, 0x0); MDP3_REG_WRITE(MDP3_DMA_P_WATERMARK_1, 0x0); MDP3_REG_WRITE(MDP3_DMA_P_WATERMARK_2, 0x0); MDP3_REG_WRITE(MDP3_PANIC_LUT0, 0xFFFF); MDP3_REG_WRITE(MDP3_PANIC_ROBUST_CTRL, 0x1); MDP3_REG_WRITE(MDP3_ROBUST_LUT, 0xFF00); rc = mdp3_clk_update(MDP3_CLK_AHB, 0); rc |= mdp3_clk_update(MDP3_CLK_AXI, 0); rc |= mdp3_clk_update(MDP3_CLK_MDP_CORE, 0); if (rc) pr_warn("fail to turn off MDP core clks\n"); return rc; } static int mdp3_res_init(void) static int mdp3_res_init(void) { { int rc = 0; int rc = 0; Loading Loading @@ -1718,6 +1747,7 @@ static int mdp3_continuous_splash_on(struct mdss_panel_data *pdata) struct mdss_panel_info *panel_info = &pdata->panel_info; struct mdss_panel_info *panel_info = &pdata->panel_info; struct mdp3_bus_handle_map *bus_handle; struct mdp3_bus_handle_map *bus_handle; u64 ab, ib; u64 ab, ib; u32 vtotal; int rc; int rc; pr_debug("mdp3__continuous_splash_on\n"); pr_debug("mdp3__continuous_splash_on\n"); Loading @@ -1733,10 +1763,13 @@ static int mdp3_continuous_splash_on(struct mdss_panel_data *pdata) pr_err("invalid bus handle %d\n", bus_handle->handle); pr_err("invalid bus handle %d\n", bus_handle->handle); return -EINVAL; return -EINVAL; } } vtotal = panel_info->yres + panel_info->lcdc.v_back_porch + panel_info->lcdc.v_front_porch + panel_info->lcdc.v_pulse_width; ab = panel_info->xres * panel_info->yres * 4 * 2; ab = panel_info->xres * vtotal * panel_info->bpp; ab *= panel_info->mipi.frame_rate; ab *= panel_info->mipi.frame_rate; ib = (ab * 3) / 2; ib = ab; rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, ab, ib); rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, ab, ib); bus_handle->restore_ab[MDP3_CLIENT_DMA_P] = ab; bus_handle->restore_ab[MDP3_CLIENT_DMA_P] = ab; bus_handle->restore_ib[MDP3_CLIENT_DMA_P] = ib; bus_handle->restore_ib[MDP3_CLIENT_DMA_P] = ib; Loading
drivers/video/msm/mdss/mdp3.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -205,6 +205,7 @@ void mdp3_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval); uint32_t interval); int mdp3_dynamic_clock_gating_ctrl(int enable); int mdp3_dynamic_clock_gating_ctrl(int enable); int mdp3_footswitch_ctrl(int enable); int mdp3_footswitch_ctrl(int enable); int mdp3_qos_remapper_setup(void); #define MDP3_REG_WRITE(addr, val) writel_relaxed(val, mdp3_res->mdp_base + addr) #define MDP3_REG_WRITE(addr, val) writel_relaxed(val, mdp3_res->mdp_base + addr) #define MDP3_REG_READ(addr) readl_relaxed(mdp3_res->mdp_base + addr) #define MDP3_REG_READ(addr) readl_relaxed(mdp3_res->mdp_base + addr) Loading
drivers/video/msm/mdss/mdp3_ctrl.c +9 −2 Original line number Original line Diff line number Diff line Loading @@ -348,13 +348,19 @@ static int mdp3_ctrl_clk_enable(struct msm_fb_data_type *mfd, int enable) static int mdp3_ctrl_res_req_bus(struct msm_fb_data_type *mfd, int status) static int mdp3_ctrl_res_req_bus(struct msm_fb_data_type *mfd, int status) { { int rc = 0; int rc = 0; u32 vtotal = 0; if (status) { if (status) { struct mdss_panel_info *panel_info = mfd->panel_info; struct mdss_panel_info *panel_info = mfd->panel_info; u64 ab = 0; u64 ab = 0; u64 ib = 0; u64 ib = 0; ab = panel_info->xres * panel_info->yres * 4 * 2; vtotal = panel_info->yres + panel_info->lcdc.v_back_porch + panel_info->lcdc.v_front_porch + panel_info->lcdc.v_pulse_width; ab = panel_info->xres * vtotal * panel_info->bpp; ab *= panel_info->mipi.frame_rate; ab *= panel_info->mipi.frame_rate; ib = (ab * 3) / 2; /* ab and ib vote should be same for honest voting */ ib = ab; rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, ab, ib); rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, ab, ib); } else { } else { rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, 0, 0); rc = mdp3_bus_scale_set_quota(MDP3_CLIENT_DMA_P, 0, 0); Loading Loading @@ -599,6 +605,7 @@ static int mdp3_ctrl_on(struct msm_fb_data_type *mfd) mdp3_ctrl_notifier_register(mdp3_session, mdp3_ctrl_notifier_register(mdp3_session, &mdp3_session->mfd->mdp_sync_pt_data.notifier); &mdp3_session->mfd->mdp_sync_pt_data.notifier); mdp3_qos_remapper_setup(); /* request bus bandwidth before DSI DMA traffic */ /* request bus bandwidth before DSI DMA traffic */ rc = mdp3_ctrl_res_req_bus(mfd, 1); rc = mdp3_ctrl_res_req_bus(mfd, 1); if (rc) { if (rc) { Loading
drivers/video/msm/mdss/mdp3_hwio.h +9 −0 Original line number Original line Diff line number Diff line Loading @@ -65,6 +65,15 @@ #define MDP3_REG_CGC_EN 0x0100 #define MDP3_REG_CGC_EN 0x0100 #define MDP3_VBIF_REG_FORCE_EN 0x0004 #define MDP3_VBIF_REG_FORCE_EN 0x0004 /* QOS Remapper */ #define MDP3_DMA_P_QOS_REMAPPER 0x90090 #define MDP3_DMA_P_WATERMARK_0 0x90094 #define MDP3_DMA_P_WATERMARK_1 0x90098 #define MDP3_DMA_P_WATERMARK_2 0x9009C #define MDP3_PANIC_ROBUST_CTRL 0x900A0 #define MDP3_PANIC_LUT0 0x900A4 #define MDP3_ROBUST_LUT 0x900AC /*danger safe*/ /*danger safe*/ #define MDP3_PANIC_ROBUST_CTRL 0x900A0 #define MDP3_PANIC_ROBUST_CTRL 0x900A0 Loading