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Commit 303ae9a9 authored by Gilad Avidov's avatar Gilad Avidov
Browse files

ARM: dts: msm: Config I2C on BLSP2 QUP5 for 8092 



Configure and enable the I2C controller at BLSP2 QUP5
for the 8092 chipset.

Change-Id: I590b65a80219af7af781c088dd2d05aeecf8c04b
Signed-off-by: default avatarGilad Avidov <gavidov@codeaurora.org>
parent 9af769f1

arch/arm/boot/dts/qti/mpq8092.dtsi

+21 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 


	aliases {

		i2c2 = &i2c_2;

		i2c11 = &i2c_11;

		spi1 = &spi_1;

		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */

		sdhc2 = &sdhc_2; /* SDC2 SD card slot */
@@ -407,6 +408,26 @@ 
		qcom,master-id = <86>;

	};



	i2c_11: i2c@f9967000 { /* BLSP2 QUP5 */

		compatible = "qcom,i2c-msm-v2";

		#address-cells = <1>;

		#size-cells = <0>;

		reg-names = "qup_phys_addr", "bam_phys_addr";

		reg = <0xf9967000 0x1000>,

		      <0xf9944000 0x19000>;

		interrupt-names = "qup_irq", "bam_irq";

		interrupts = <0 105 0>, <0 239 0>;

		qcom,clk-freq-out = <100000>;

		qcom,clk-freq-in  = <19200000>;

		qcom,gpio-sda = <&msmgpio 81 0>;

		qcom,gpio-scl = <&msmgpio 82 0>;

		qcom,noise-rjct-scl = <0>;

		qcom,noise-rjct-sda = <0>;

		qcom,bam-pipe-idx-cons = <20>;

		qcom,bam-pipe-idx-prod = <21>;

		qcom,master-id = <84>;

	};



	memory_hole: qcom,msm-mem-hole {

		compatible = "qcom,msm-mem-hole";

		qti,memblock-remove = <0x0c800000 0x03600000>;

arch/arm/mach-msm/board-8092-gpiomux.c

+12 −0
Original line number Diff line number Diff line
@@ -78,6 +78,18 @@ static struct msm_gpiomux_config msm_blsp_configs[] __initdata = { 
			[GPIOMUX_SUSPENDED] = &gpio_uart_config,

		},

	},

	{

		.gpio      = 81,		/* BLSP2 QUP5 I2C_SDA */

		.settings = {

			[GPIOMUX_SUSPENDED] = &gpio_i2c_config,

		},

	},

	{

		.gpio      = 82,		/* BLSP2 QUP5 I2C_SCL */

		.settings = {

			[GPIOMUX_SUSPENDED] = &gpio_i2c_config,

		},

	},

};



void __init mpq8092_init_gpiomux(void)

arch/arm/mach-msm/clock-8092.c

+2 −2
Original line number Diff line number Diff line
@@ -6536,7 +6536,7 @@ static struct clk_lookup mpq_clocks_8092[] = { 
	CLK_LOOKUP("",	gcc_blsp1_uart6_apps_clk.c,	""),



	/* BLSP2 */

	CLK_LOOKUP("",	gcc_blsp2_ahb_clk.c,	""),

	CLK_LOOKUP("iface_clk",	gcc_blsp2_ahb_clk.c,	"f9967000.i2c"),

	CLK_LOOKUP("",	gcc_blsp2_qup1_i2c_apps_clk.c,	""),

	CLK_LOOKUP("",	gcc_blsp2_qup1_spi_apps_clk.c,	""),

	CLK_LOOKUP("",	gcc_blsp2_qup2_i2c_apps_clk.c,	""),
@@ -6545,7 +6545,7 @@ static struct clk_lookup mpq_clocks_8092[] = { 
	CLK_LOOKUP("",	gcc_blsp2_qup3_spi_apps_clk.c,	""),

	CLK_LOOKUP("",	gcc_blsp2_qup4_i2c_apps_clk.c,	""),

	CLK_LOOKUP("",	gcc_blsp2_qup4_spi_apps_clk.c,	""),

	CLK_LOOKUP("",	gcc_blsp2_qup5_i2c_apps_clk.c,	""),

	CLK_LOOKUP("core_clk",	gcc_blsp2_qup5_i2c_apps_clk.c,	"f9967000.i2c"),

	CLK_LOOKUP("",	gcc_blsp2_qup5_spi_apps_clk.c,	""),

	CLK_LOOKUP("",	gcc_blsp2_qup6_i2c_apps_clk.c,	""),

	CLK_LOOKUP("",	gcc_blsp2_qup6_spi_apps_clk.c,	""),