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Commit 2fca82fb authored by Manu Gautam's avatar Manu Gautam
Browse files

msm: ehci-hsic: Add support to disable internal clock gating 



EHCI cores on latest MSMs have internal clock gating enabled
by default. Stability issues (random enumeration failures)
have been observed with some CORES where clock gating feature
doesn't work as expected. Provide a DT parameter that can be
used to disabled clock gating in hardware.

CRs-fixed: 538509
Change-Id: I1fcac505e4a240367e3a685b5e8c78f52fbb2f6a
Signed-off-by: default avatarWesley Cheng <wcheng@codeaurora.org>
Signed-off-by: default avatarManu Gautam <mgautam@codeaurora.org>
parent 196a5b7f

Documentation/devicetree/bindings/usb/msm-ehci-hsic.txt

+2 −0
Original line number Diff line number Diff line
@@ -85,6 +85,8 @@ Optional properties : 
- hsic,vdd-voltage-level: This property must be a list of three integer

  values (no, min, max) where each value represents either a voltage in

  microvolts or a value corresponding to voltage corner

- qcom,disable-internal-clk-gating: If present then internal clock gating in

  controller is disabled. Internal clock gating is enabled by default in hw.



- Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for

  below optional properties:

drivers/usb/host/ehci-msm-hsic.c

+9 −0
Original line number Diff line number Diff line
@@ -1091,6 +1091,7 @@ static int ehci_hsic_reset(struct usb_hcd *hcd) 
	struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);

	struct msm_hsic_host_platform_data *pdata = mehci->dev->platform_data;

	int retval;

	u32 temp;



	mehci->timer = USB_HS_GPTIMER_BASE;

	ehci->caps = USB_CAPLENGTH;
@@ -1110,6 +1111,12 @@ static int ehci_hsic_reset(struct usb_hcd *hcd) 
	else

		writel_relaxed(0x08, USB_AHBMODE);



	if (pdata->dis_internal_clk_gating) {

		temp = readl_relaxed(USB_GENCONFIG2);

		temp &= ~GENCFG2_SYS_CLK_HOST_DEV_GATE_EN;

		writel_relaxed(temp, USB_GENCONFIG2);

	}



	/* Disable streaming mode and select host mode */

	writel_relaxed(0x13, USB_USBMODE);
@@ -1892,6 +1899,8 @@ struct msm_hsic_host_platform_data *msm_hsic_dt_to_pdata( 


	pdata->phy_sof_workaround = of_property_read_bool(node,

					"qcom,phy-sof-workaround");

	pdata->dis_internal_clk_gating = of_property_read_bool(node,

					"qcom,disable-internal-clk-gating");

	pdata->phy_susp_sof_workaround = of_property_read_bool(node,

					"qcom,phy-susp-sof-workaround");

	pdata->ignore_cal_pad_config = of_property_read_bool(node,

include/linux/usb/msm_hsusb.h

+3 −0
Original line number Diff line number Diff line
@@ -478,6 +478,8 @@ struct ci13xxx_platform_data { 
 * @phy_sof_workaround: Enable ALL PHY SOF bug related workarounds for

		SUSPEND, RESET and RESUME.

 * @phy_susp_sof_workaround: Enable PHY SOF workaround only for SUSPEND.

 * @dis_internal_clk_gating: If set, internal clock gating in controller

 *		is disabled.

 *

 */

struct msm_hsic_host_platform_data {
@@ -485,6 +487,7 @@ struct msm_hsic_host_platform_data { 
	unsigned data;

	bool ignore_cal_pad_config;

	bool phy_sof_workaround;

	bool dis_internal_clk_gating;

	bool phy_susp_sof_workaround;

	u32 reset_delay;

	int strobe_pad_offset;

include/linux/usb/msm_hsusb_hw.h

+4 −3
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 


#define GENCFG2_SESS_VLD_CTRL_EN		BIT(7)

#define GENCFG2_LINESTATE_DIFF_WAKEUP_EN	BIT(12)

#define GENCFG2_SYS_CLK_HOST_DEV_GATE_EN	BIT(13)

#define GENCFG2_DPSE_DMSE_HV_INTR_EN		BIT(15)



#define USB_USBCMD           (MSM_USB_BASE + 0x0140)