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Commit 2d354c34 authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
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drm/i915: Don't try to use SPR_SCALE when we don't have a sprite scaler 



Haswell does not have a scaler in the sprite pipeline anymore, so let's
ensure:
  1/ We bail out of update_plate() when someone is trying to ask to
     display a scaled framebuffer,
  2/ We never write to the nonexistent SPR_SCALE register

v2: Smash in the fixup from Damien in the disable_plane function.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> (for v1)
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (for v1)
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 9324cf7f

drivers/gpu/drm/i915/intel_drv.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -229,6 +229,7 @@ struct intel_plane { 
	struct drm_plane base;

	struct drm_plane base;

	enum pipe pipe;

	enum pipe pipe;

	struct drm_i915_gem_object *obj;

	struct drm_i915_gem_object *obj;

	bool can_scale;

	int max_downscale;

	int max_downscale;

	u32 lut_r[1024], lut_g[1024], lut_b[1024];

	u32 lut_r[1024], lut_g[1024], lut_b[1024];

	void (*update_plane)(struct drm_plane *plane,

	void (*update_plane)(struct drm_plane *plane,

drivers/gpu/drm/i915/intel_sprite.c

+15 −2
Original line number Original line Diff line number Diff line
@@ -136,6 +136,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, 
		I915_WRITE(SPRLINOFF(pipe), offset);

		I915_WRITE(SPRLINOFF(pipe), offset);

	}

	}

	I915_WRITE(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);

	I915_WRITE(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);

	if (intel_plane->can_scale)

		I915_WRITE(SPRSCALE(pipe), sprscale);

		I915_WRITE(SPRSCALE(pipe), sprscale);

	I915_WRITE(SPRCTL(pipe), sprctl);

	I915_WRITE(SPRCTL(pipe), sprctl);

	I915_MODIFY_DISPBASE(SPRSURF(pipe), obj->gtt_offset);

	I915_MODIFY_DISPBASE(SPRSURF(pipe), obj->gtt_offset);
@@ -152,6 +153,7 @@ ivb_disable_plane(struct drm_plane *plane) 




	I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE);

	I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE);

	/* Can't leave the scaler enabled... */

	/* Can't leave the scaler enabled... */

	if (intel_plane->can_scale)

		I915_WRITE(SPRSCALE(pipe), 0);

		I915_WRITE(SPRSCALE(pipe), 0);

	/* Activate double buffered register update */

	/* Activate double buffered register update */

	I915_MODIFY_DISPBASE(SPRSURF(pipe), 0);

	I915_MODIFY_DISPBASE(SPRSURF(pipe), 0);
@@ -472,6 +474,12 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, 
	if (!crtc_w || !crtc_h) /* Again, nothing to display */

	if (!crtc_w || !crtc_h) /* Again, nothing to display */

		goto out;

		goto out;





	/*

	 * We may not have a scaler, eg. HSW does not have it any more

	 */

	if (!intel_plane->can_scale && (crtc_w != src_w || crtc_h != src_h))

		return -EINVAL;



	/*

	/*

	 * We can take a larger source and scale it down, but

	 * We can take a larger source and scale it down, but

	 * only so much...  16x is the max on SNB.

	 * only so much...  16x is the max on SNB.
@@ -665,6 +673,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe) 
	switch (INTEL_INFO(dev)->gen) {

	switch (INTEL_INFO(dev)->gen) {

	case 5:

	case 5:

	case 6:

	case 6:

		intel_plane->can_scale = true;

		intel_plane->max_downscale = 16;

		intel_plane->max_downscale = 16;

		intel_plane->update_plane = ilk_update_plane;

		intel_plane->update_plane = ilk_update_plane;

		intel_plane->disable_plane = ilk_disable_plane;

		intel_plane->disable_plane = ilk_disable_plane;
@@ -681,6 +690,10 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe) 
		break;

		break;





	case 7:

	case 7:

		if (IS_HASWELL(dev))

			intel_plane->can_scale = false;

		else

			intel_plane->can_scale = true;

		intel_plane->max_downscale = 2;

		intel_plane->max_downscale = 2;

		intel_plane->update_plane = ivb_update_plane;

		intel_plane->update_plane = ivb_update_plane;

		intel_plane->disable_plane = ivb_disable_plane;

		intel_plane->disable_plane = ivb_disable_plane;