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Commit 2ca05aba authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "clock-gcc-8994: Add MSS_GPLL0 gate clock"

parents a08ee70c b544ed99

drivers/clk/qcom/clock-gcc-8994.c

+14 −0
Original line number Diff line number Diff line
@@ -1394,6 +1394,19 @@ static struct gate_clk gpll0_out_mmsscc = { 
	},

};



static struct gate_clk gpll0_out_msscc = {

	.en_reg = APCS_CLOCK_BRANCH_ENA_VOTE,

	.en_mask = BIT(27),

	.delay_us = 1,

	.base = &virt_base,

	.c = {

		.parent = &gpll0_out_main.c,

		.dbg_name = "gpll0_out_msscc",

		.ops = &clk_ops_gate,

		CLK_INIT(gpll0_out_msscc.c),

	},

};



static struct gate_clk pcie_0_phy_ldo = {

	.en_reg = PCIE_0_PHY_LDO_EN,

	.en_mask = BIT(0),
@@ -2686,6 +2699,7 @@ static struct clk_lookup msm_clocks_gcc_8994[] = { 
	CLK_LIST(gcc_qusb2_phy_reset),

	CLK_LIST(gcc_usb3_phy_reset),

	CLK_LIST(gpll0_out_mmsscc),

	CLK_LIST(gpll0_out_msscc),

	CLK_LIST(pcie_0_phy_ldo),

	CLK_LIST(pcie_1_phy_ldo),

	CLK_LIST(ufs_phy_ldo),

include/dt-bindings/clock/msm-clocks-8994.h

+1 −0
Original line number Diff line number Diff line
@@ -158,6 +158,7 @@ 
#define clk_gcc_qusb2_phy_reset 0x3ce5fa84

#define clk_gcc_usb3_phy_reset 0x03d559f1

#define clk_gpll0_out_mmsscc 0x0ded70aa

#define clk_gpll0_out_msscc 0x7d794829

#define clk_pcie_0_phy_ldo 0x1d30d092

#define clk_pcie_1_phy_ldo 0x63474b42

#define clk_ufs_phy_ldo 0x98111fee