Merge "platform: qpnp-power-on: choose correct s2 control registers" (2c60b577) · Commits · e / devices / android_kernel_sony_msm8994

drivers/platform/msm/qpnp-power-on.c

+18 −14

Original line number	Diff line number	Diff line
		@@ -30,6 +30,7 @@

		#define PMIC8941_V1_REV4 0x01
		#define PMIC8941_V2_REV4 0x02
		#define PON_REV2_VALUE 0x00

		/* Common PNP defines */
		#define QPNP_PON_REVISION2(base) (base + 0x01)
		@@ -105,7 +106,6 @@
		#define QPNP_PON_MAX_DBC_US (USEC_PER_SEC * 2)

		#define QPNP_KEY_STATUS_DELAY msecs_to_jiffies(250)
		#define QPNP_PON_REV_B 0x01

		#define QPNP_PON_BUFFER_SIZE 9

		@@ -303,7 +303,7 @@ int qpnp_pon_system_pwr_off(enum pon_power_off_type type)
		return rc;
		}

		if (reg == 0x00)
		if (reg == PON_REV2_VALUE)
		rst_en_reg = QPNP_PON_PS_HOLD_RST_CTL(pon->base);
		else
		rst_en_reg = QPNP_PON_PS_HOLD_RST_CTL2(pon->base);
		@@ -976,14 +976,18 @@ static int qpnp_pon_config_init(struct qpnp_pon *pon)
		}
		}

		if (pon_ver == QPNP_PON_REV_B) {
		/* If the value read from REVISION2 register is 0x00,
		then there is a single register to control s2 reset.
		Otherwise there are separate registers for s2 reset
		type and s2 reset enable */
		if (pon_ver == PON_REV2_VALUE) {
		cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
		QPNP_PON_KPDPWR_S2_CNTL(pon->base);
		} else {
		cfg->s2_cntl_addr =
		QPNP_PON_KPDPWR_S2_CNTL(pon->base);
		cfg->s2_cntl2_addr =
		QPNP_PON_KPDPWR_S2_CNTL2(pon->base);
		} else {
		cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
		QPNP_PON_KPDPWR_S2_CNTL(pon->base);
		}

		break;
		@@ -1048,14 +1052,14 @@ static int qpnp_pon_config_init(struct qpnp_pon *pon)
		}
		}

		if (pon_ver == QPNP_PON_REV_B) {
		if (pon_ver == PON_REV2_VALUE) {
		cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
		QPNP_PON_RESIN_S2_CNTL(pon->base);
		} else {
		cfg->s2_cntl_addr =
		QPNP_PON_RESIN_S2_CNTL(pon->base);
		cfg->s2_cntl2_addr =
		QPNP_PON_RESIN_S2_CNTL2(pon->base);
		} else {
		cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
		QPNP_PON_RESIN_S2_CNTL(pon->base);
		}

		break;
		@@ -1089,14 +1093,14 @@ static int qpnp_pon_config_init(struct qpnp_pon *pon)
		}
		}

		if (pon_ver == QPNP_PON_REV_B) {
		if (pon_ver == PON_REV2_VALUE) {
		cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
		QPNP_PON_KPDPWR_RESIN_S2_CNTL(pon->base);
		} else {
		cfg->s2_cntl_addr =
		QPNP_PON_KPDPWR_RESIN_S2_CNTL(pon->base);
		cfg->s2_cntl2_addr =
		QPNP_PON_KPDPWR_RESIN_S2_CNTL2(pon->base);
		} else {
		cfg->s2_cntl_addr = cfg->s2_cntl2_addr =
		QPNP_PON_KPDPWR_RESIN_S2_CNTL(pon->base);
		}

		break;