Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2b8b4913 authored by Ben Dooks's avatar Ben Dooks Committed by Russell King
Browse files

[ARM] 3661/1: S3C2412: Fix compilation if CPU_S3C2410 only



Patch from Ben Dooks

If only the S3C2412 based machines are selected,
then the regs-dsc.h does not export the S3C2412_DSC
registers as it is wrapped in CONFIG_CPU_S3C2440.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent b8ccca4a
Loading
Loading
Loading
Loading
+7 −9
Original line number Diff line number Diff line
@@ -7,25 +7,23 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * S3C2440 Signal Drive Strength Control
 *
 *  Changelog:
 *    11-Aug-2004     BJD     Created file
 *    25-Aug-2004     BJD     Added the _SELECT_* defs for using with functions
 * S3C2440/S3C2412 Signal Drive Strength Control
*/


#ifndef __ASM_ARCH_REGS_DSC_H
#define __ASM_ARCH_REGS_DSC_H "2440-dsc"

#ifdef CONFIG_CPU_S3C2440
#if defined(CONFIG_CPU_S3C2412)
#define S3C2412_DSC0	   S3C2410_GPIOREG(0xdc)
#define S3C2412_DSC1	   S3C2410_GPIOREG(0xe0)
#endif

#if defined(CONFIG_CPU_S3C2440)

#define S3C2440_DSC0	   S3C2410_GPIOREG(0xc4)
#define S3C2440_DSC1	   S3C2410_GPIOREG(0xc8)

#define S3C2412_DSC0	   S3C2410_GPIOREG(0xdc)
#define S3C2412_DSC1	   S3C2410_GPIOREG(0xe0)

#define S3C2440_SELECT_DSC0 (0)
#define S3C2440_SELECT_DSC1 (1<<31)