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Commit 2b056e59 authored by Junjie Wu's avatar Junjie Wu
Browse files

msm: clock-samarium: Introduce clock driver for samarium 



Introduce the clock driver to allow client drivers to control
GCC and MMSS clocks in samarium.

Change-Id: I006c0ed6c9e8fe1c104dae429ab84ff3ca5f323b
Signed-off-by: default avatarJunjie Wu <junjiew@codeaurora.org>
parent a650b745

arch/arm/mach-msm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -276,6 +276,7 @@ obj-$(CONFIG_ARCH_APQ8084) += clock-krait-8974.o 
obj-$(CONFIG_ARCH_MSM8974) += board-8974.o board-8974-gpiomux.o

obj-$(CONFIG_ARCH_MSM8974) += clock-krait-8974.o

obj-$(CONFIG_ARCH_MSM8974) += clock-local2.o clock-pll.o clock-8974.o clock-rpm.o clock-voter.o clock-mdss-8974.o

obj-$(CONFIG_ARCH_MSMSAMARIUM) += clock-samarium.o

obj-$(CONFIG_ARCH_MSM8974) += gdsc.o

obj-$(CONFIG_ARCH_MSM9625) += gdsc.o

obj-$(CONFIG_ARCH_MSM8226) += gdsc.o

arch/arm/mach-msm/board-samarium.c

+4 −112
Original line number Diff line number Diff line
@@ -38,117 +38,6 @@ 
#include "modem_notifier.h"

#include "pm.h"



static struct clk_lookup msm_clocks_dummy[] = {

	CLK_DUMMY("xo",          cxo_pil_lpass_clk, "fe200000.qcom,lpass", OFF),

	CLK_DUMMY("core_clk",          q6ss_xo_clk, "fe200000.qcom,lpass", OFF),

	CLK_DUMMY("bus_clk",  gcc_lpass_q6_axi_clk, "fe200000.qcom,lpass", OFF),

	CLK_DUMMY("iface_clk", q6ss_ahb_lfabif_clk, "fe200000.qcom,lpass", OFF),

	CLK_DUMMY("reg_clk",         q6ss_ahbm_clk, "fe200000.qcom,lpass", OFF),



	CLK_DUMMY("core_clk",  venus_vcodec0_clk,  "fdce0000.qcom,venus", OFF),

	CLK_DUMMY("iface_clk", venus_ahb_clk,      "fdce0000.qcom,venus", OFF),

	CLK_DUMMY("bus_clk",   venus_axi_clk,      "fdce0000.qcom,venus", OFF),

	CLK_DUMMY("mem_clk",   venus_ocmemnoc_clk, "fdce0000.qcom,venus", OFF),

	CLK_DUMMY("core_clk",  venus_vcodec0_clk,  "fd8c1024.qcom,gdsc",  OFF),



	CLK_DUMMY("xo",                CXO_CLK, "fc880000.qcom,mss", OFF),

	CLK_DUMMY("bus_clk",   MSS_BIMC_Q6_CLK, "fc880000.qcom,mss", OFF),

	CLK_DUMMY("iface_clk", MSS_CFG_AHB_CLK, "fc880000.qcom,mss", OFF),

	CLK_DUMMY("mem_clk",  BOOT_ROM_AHB_CLK, "fc880000.qcom,mss", OFF),

	CLK_DUMMY("xo",		XO_CLK,		"fb21b000.qcom,pronto", OFF),

	CLK_DUMMY("core_clk",   BLSP1_UART_CLK, "f991f000.serial", OFF),

	CLK_DUMMY("iface_clk",  BLSP1_UART_CLK, "f991f000.serial", OFF),

	CLK_DUMMY("core_clk",   BLSP1_UART_CLK, "f991e000.serial", OFF),

	CLK_DUMMY("iface_clk",  BLSP1_UART_CLK, "f991e000.serial", OFF),

	CLK_DUMMY("core_clk",	SDC1_CLK,	"msm_sdcc.1", OFF),

	CLK_DUMMY("iface_clk",	SDC1_P_CLK,	"msm_sdcc.1", OFF),

	CLK_DUMMY("core_clk",	SDC2_CLK,	"msm_sdcc.2", OFF),

	CLK_DUMMY("iface_clk",	SDC2_P_CLK,	"msm_sdcc.2", OFF),

	CLK_DUMMY("core_clk",	USB_HS_SYSTEM_CLK, "msm_otg", OFF),

	CLK_DUMMY("iface_clk",	USB_HS_AHB_CLK,    "msm_otg", OFF),

	CLK_DUMMY("xo",         CXO_OTG_CLK,       "msm_otg", OFF),

	CLK_DUMMY("dfab_clk",	DFAB_CLK,	"msm_sps", OFF),

	CLK_DUMMY("dma_bam_pclk",	DMA_BAM_P_CLK,	"msm_sps", OFF),

	CLK_DUMMY("core_clk",   SPI_CLK,        "spi_qsd.1",  OFF),

	CLK_DUMMY("iface_clk",  SPI_P_CLK,      "spi_qsd.1",  OFF),

	CLK_DUMMY("core_clk", gcc_prng_ahb_clk.c, "f9bff000.qcom,msm-rng", OFF),

	CLK_DUMMY("core_clk",	I2C_CLK,	"f9924000.i2c", OFF),

	CLK_DUMMY("iface_clk",	I2C_P_CLK,	"f9924000.i2c", OFF),



	/* CoreSight clocks */

	CLK_DUMMY("core_clk", qdss_clk.c, "fc326000.tmc", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc320000.tpiu", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc324000.replicator", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc325000.tmc", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc323000.funnel", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc321000.funnel", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc322000.funnel", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc355000.funnel", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc302000.stm", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc34c000.etm", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc34d000.etm", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc34e000.etm", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc34f000.etm", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc310000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc311000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc312000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc313000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc314000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc315000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc316000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc317000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc318000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc351000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc352000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc353000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc354000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc350000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc330000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc33c000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fc360000.cti", OFF),

	CLK_DUMMY("core_clk", qdss_clk.c, "fd828018.hwevent", OFF),



	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc326000.tmc", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc320000.tpiu", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc324000.replicator", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc325000.tmc", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc323000.funnel", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc321000.funnel", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc322000.funnel", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc355000.funnel", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc302000.stm", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc34c000.etm", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc34d000.etm", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc34e000.etm", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc34f000.etm", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc310000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc311000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc312000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc313000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc314000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc315000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc316000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc317000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc318000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc351000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc352000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc353000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc354000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc350000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc330000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc33c000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fc360000.cti", OFF),

	CLK_DUMMY("core_a_clk", qdss_a_clk.c, "fd828018.hwevent", OFF),



	CLK_DUMMY("core_mmss_clk", mmss_misc_ahb_clk.c, "fd828018.hwevent",

		  OFF),

};



static struct clock_init_data msm_dummy_clock_init_data __initdata = {

	.table = msm_clocks_dummy,

	.size = ARRAY_SIZE(msm_clocks_dummy),

};



static struct of_dev_auxdata msmsamarium_auxdata_lookup[] __initdata = {

	OF_DEV_AUXDATA("qcom,msm-sdcc", 0xF9824000, \

			"msm_sdcc.1", NULL),
@@ -210,7 +99,10 @@ void __init msmsamarium_add_drivers(void) 
	msm_pm_sleep_status_init();

	rpm_regulator_smd_driver_init();

	msm_spm_device_init();

	msm_clock_init(&msm_dummy_clock_init_data);

	if (of_board_is_rumi())

		msm_clock_init(&msmsamarium_rumi_clock_init_data);

	else

		msm_clock_init(&msmsamarium_clock_init_data);

	tsens_tm_init_driver();

}

arch/arm/mach-msm/clock-samarium.c

0 → 100644
+3774 −0

File added.

Preview size limit exceeded, changes collapsed.

arch/arm/mach-msm/clock.h

+2 −0
Original line number Diff line number Diff line
@@ -58,6 +58,8 @@ extern struct clock_init_data apq8084_clock_init_data; 
extern struct clock_init_data apq8084_rumi_clock_init_data;

extern struct clock_init_data mpq8092_clock_init_data;

extern struct clock_init_data msmkrypton_clock_init_data;

extern struct clock_init_data msmsamarium_clock_init_data;

extern struct clock_init_data msmsamarium_rumi_clock_init_data;



int msm_clock_init(struct clock_init_data *data);

int find_vdd_level(struct clk *clk, unsigned long rate);