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Commit 2aa27baa authored by Tarun Karra's avatar Tarun Karra
Browse files

msm: kgsl: Map full GPU address range and access shader memory as an offset 



On older GPU's GPU SMMU registers were physically located between GPU
registers and GPU shader memory, so we had to map these 2 physical regions
seperately in driver. On newer GPU's this is not a limitation anymore
so map full GPU address range and access shader memory as an offset
when required.

Change-Id: I3b17595e631a1f4fa2d913214ebc3911f4d2e3d9
Signed-off-by: default avatarTarun Karra <tkarra@codeaurora.org>
parent acdce027

drivers/gpu/msm/adreno-gpulist.h

+2 −0
Original line number Diff line number Diff line
@@ -191,5 +191,7 @@ static const struct adreno_gpu_core adreno_gpulist[] = { 
		.pm4_bstrp_size = 0x06,

		.pfp_bstrp_size = 0x28,

		.pfp_bstrp_ver = 0x4ff091,

		.shader_offset = 0x20000,

		.shader_size = 0x10000,

	},

};

drivers/gpu/msm/adreno.c

+17 −0
Original line number Diff line number Diff line
@@ -1306,6 +1306,23 @@ static int adreno_init(struct kgsl_device *device) 


	set_bit(ADRENO_DEVICE_INITIALIZED, &adreno_dev->priv);



	/* Use shader offset and length defined in gpudev */

	if (adreno_dev->gpucore->shader_offset &&

					adreno_dev->gpucore->shader_size) {



		if (device->shader_mem_phys || device->shader_mem_virt)

			KGSL_DRV_ERR(device,

			"Shader memory already specified in device tree\n");

		else {

			device->shader_mem_phys = device->reg_phys +

					adreno_dev->gpucore->shader_offset;

			device->shader_mem_virt = device->reg_virt +

					adreno_dev->gpucore->shader_offset;

			device->shader_mem_len =

					adreno_dev->gpucore->shader_size;

		}

	}



	/* Adjust snapshot section sizes according to core */

	if ((adreno_is_a330(adreno_dev) || adreno_is_a305b(adreno_dev))) {

		gpudev->snapshot_data->sect_sizes->cp_state_deb =

drivers/gpu/msm/adreno.h

+4 −0
Original line number Diff line number Diff line
@@ -215,6 +215,8 @@ struct adreno_busy_data { 
 * @pm4_bstrp_size: Size of the bootstrap loader for PM4 microcode

 * @pfp_bstrp_size: Size of the bootstrap loader for PFP microcde

 * @pfp_bstrp_ver: Version of the PFP microcode that supports bootstraping

 * @shader_offset: Offset of shader from gpu reg base

 * @shader_size: Shader size

 */

struct adreno_gpu_core {

	enum adreno_gpurev gpurev;
@@ -233,6 +235,8 @@ struct adreno_gpu_core { 
	unsigned int pm4_bstrp_size;

	unsigned int pfp_bstrp_size;

	unsigned int pfp_bstrp_ver;

	unsigned long shader_offset;

	unsigned int shader_size;

};



struct adreno_device {

drivers/gpu/msm/kgsl.c

+2 −2
Original line number Diff line number Diff line
@@ -4414,7 +4414,7 @@ int kgsl_device_platform_probe(struct kgsl_device *device) 
						device->shadermemname);



		if (res == NULL) {

			KGSL_DRV_ERR(device,

			KGSL_DRV_WARN(device,

			"Shader memory: platform_get_resource_byname failed\n");

		}
@@ -4427,7 +4427,7 @@ int kgsl_device_platform_probe(struct kgsl_device *device) 
					device->shader_mem_phys,

					device->shader_mem_len,

						device->name)) {

			KGSL_DRV_ERR(device, "request_mem_region_failed\n");

			KGSL_DRV_WARN(device, "request_mem_region_failed\n");

		}

	}