Loading arch/arm/boot/dts/qcom/msm8939-camera.dtsi +12 −9 Original line number Diff line number Diff line Loading @@ -255,7 +255,7 @@ interrupts = <0 49 0>; interrupt-names = "cpp"; vdd-supply = <&gdsc_vfe>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_vfe_ahb_clk>, Loading @@ -264,12 +264,13 @@ <&clock_gcc clk_gcc_camss_vfe_axi_clk>, <&clock_gcc clk_gcc_camss_micro_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>; clock-names = "camss_top_ahb_clk", "vfe_clk_src", <&clock_gcc clk_gcc_camss_top_ahb_clk>; clock-names = "ispif_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk", "cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk", "camss_ahb_clk", "ispif_ahb_clk"; qcom,clock-rates = <0 320000000 0 0 320000000 0 0 0 0 80000000>; "camss_ahb_clk", "camss_top_ahb_clk"; qcom,clock-rates = <80000000 320000000 0 0 320000000 0 0 0 0 0>; bus_master = <1>; }; cci: qcom,cci@1b0c000 { Loading @@ -281,14 +282,16 @@ reg-names = "cci"; interrupts = <0 50 0>; interrupt-names = "cci"; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_cci_clk_src>, <&clock_gcc clk_gcc_camss_cci_ahb_clk>, <&clock_gcc clk_gcc_camss_cci_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "cci_src_clk", "cci_ahb_clk", "cci_clk", "camss_ahb_clk"; qcom,clock-rates = <0 19200000 0 0 0>; clock-names = "ispif_ahb_clk", "camss_top_ahb_clk", "cci_src_clk", "cci_ahb_clk", "cci_clk", "camss_ahb_clk"; qcom,clock-rates = <80000000 0 19200000 0 0 0>; pinctrl-names = "cci_default", "cci_suspend"; pinctrl-0 = <&cci0_default>; pinctrl-1 = <&cci0_sleep>; Loading Loading
arch/arm/boot/dts/qcom/msm8939-camera.dtsi +12 −9 Original line number Diff line number Diff line Loading @@ -255,7 +255,7 @@ interrupts = <0 49 0>; interrupt-names = "cpp"; vdd-supply = <&gdsc_vfe>; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_vfe0_clk_src>, <&clock_gcc clk_gcc_camss_vfe0_clk>, <&clock_gcc clk_gcc_camss_vfe_ahb_clk>, Loading @@ -264,12 +264,13 @@ <&clock_gcc clk_gcc_camss_vfe_axi_clk>, <&clock_gcc clk_gcc_camss_micro_ahb_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>, <&clock_gcc clk_gcc_camss_ispif_ahb_clk>; clock-names = "camss_top_ahb_clk", "vfe_clk_src", <&clock_gcc clk_gcc_camss_top_ahb_clk>; clock-names = "ispif_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk", "cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk", "camss_ahb_clk", "ispif_ahb_clk"; qcom,clock-rates = <0 320000000 0 0 320000000 0 0 0 0 80000000>; "camss_ahb_clk", "camss_top_ahb_clk"; qcom,clock-rates = <80000000 320000000 0 0 320000000 0 0 0 0 0>; bus_master = <1>; }; cci: qcom,cci@1b0c000 { Loading @@ -281,14 +282,16 @@ reg-names = "cci"; interrupts = <0 50 0>; interrupt-names = "cci"; clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>, clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>, <&clock_gcc clk_gcc_camss_top_ahb_clk>, <&clock_gcc clk_cci_clk_src>, <&clock_gcc clk_gcc_camss_cci_ahb_clk>, <&clock_gcc clk_gcc_camss_cci_clk>, <&clock_gcc clk_gcc_camss_ahb_clk>; clock-names = "camss_top_ahb_clk", "cci_src_clk", "cci_ahb_clk", "cci_clk", "camss_ahb_clk"; qcom,clock-rates = <0 19200000 0 0 0>; clock-names = "ispif_ahb_clk", "camss_top_ahb_clk", "cci_src_clk", "cci_ahb_clk", "cci_clk", "camss_ahb_clk"; qcom,clock-rates = <80000000 0 19200000 0 0 0>; pinctrl-names = "cci_default", "cci_suspend"; pinctrl-0 = <&cci0_default>; pinctrl-1 = <&cci0_sleep>; Loading