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Commit 27382680 authored by Abhijeet Dharmapurikar's avatar Abhijeet Dharmapurikar
Browse files

irqchip: gic: skip cluster power collapse activities 



On some architectures the gic is kept powered on throughout power
collapse. These architectures need not save and restore distributor and
cpu regisiters. Allow for skipping power collapse related activities by
creating a boolean flag and setting that via IRQCHIP_DECLARE's callback
function.

Change-Id: Ic178cb39b974dca794f50e3027074e0eca678e19
Signed-off-by: default avatarAbhijeet Dharmapurikar <adharmap@codeaurora.org>
parent f235a4bd

drivers/irqchip/irq-gic.c

+10 −2
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ struct gic_chip_data { 
static DEFINE_RAW_SPINLOCK(irq_controller_lock);



#ifdef CONFIG_CPU_PM

static bool skip_cluster_collapse_activites;

static unsigned int saved_dist_ctrl, saved_cpu_ctrl;

#endif
@@ -857,7 +858,7 @@ static void __init gic_pm_init(struct gic_chip_data *gic) 
		sizeof(u32));

	BUG_ON(!gic->saved_ppi_conf);



	if (gic == &gic_data[0])

	if (gic == &gic_data[0] && !skip_cluster_collapse_activites)

		cpu_pm_register_notifier(&gic_notifier_block);

}

#else
@@ -1111,9 +1112,16 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) 
	gic_cnt++;

	return 0;

}



int __init msm_gic_of_init(struct device_node *node, struct device_node *parent)

{

	skip_cluster_collapse_activites = true;

	return gic_of_init(node, parent);

}



IRQCHIP_DECLARE(cortex_a15_gic, "arm,cortex-a15-gic", gic_of_init);

IRQCHIP_DECLARE(cortex_a9_gic, "arm,cortex-a9-gic", gic_of_init);

IRQCHIP_DECLARE(msm_8660_qgic, "qcom,msm-8660-qgic", gic_of_init);

IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);

IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", msm_gic_of_init);



#endif