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Commit 24f47bef authored by Mahesh Sivasubramanian's avatar Mahesh Sivasubramanian
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msm: spm: Unify SPM enums for power modes



Unify the SPM enums for power modes across multiple devices. This
prevents the driver from having to maintain different tables to support
multiple SPM devices in the system. Currently, only two types of SPM
devices are supported, cpu and L2, but multiple such SPM devices could
be available on newer targets.

Change-Id: I89305bee79ca8a1560f9ea1b81e241713a43c8ab
Signed-off-by: default avatarMahesh Sivasubramanian <msivasub@codeaurora.org>
parent 673f6d76
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+12 −16
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ static struct notifier_block __refdata lpm_cpu_nblk = {
};

static uint32_t allowed_l2_mode;
static uint32_t sysfs_dbg_l2_mode = MSM_SPM_L2_MODE_POWER_COLLAPSE;
static uint32_t sysfs_dbg_l2_mode = MSM_SPM_MODE_POWER_COLLAPSE;
static uint32_t default_l2_mode;


@@ -205,21 +205,18 @@ static int lpm_set_l2_mode(struct lpm_system_state *system_state,
	msm_pm_set_l2_flush_flag(MSM_SCM_L2_ON);

	switch (sleep_mode) {
	case MSM_SPM_L2_MODE_POWER_COLLAPSE:
	case MSM_SPM_MODE_POWER_COLLAPSE:
		krait_pmic_pre_disable();
		msm_pm_set_l2_flush_flag(MSM_SCM_L2_OFF);
		break;
	case MSM_SPM_L2_MODE_GDHS:
	case MSM_SPM_MODE_GDHS:
		msm_pm_set_l2_flush_flag(MSM_SCM_L2_GDHS);
		break;
	case MSM_SPM_L2_MODE_PC_NO_RPM:
		msm_pm_set_l2_flush_flag(MSM_SCM_L2_OFF);
		break;
	case MSM_SPM_L2_MODE_RETENTION:
	case MSM_SPM_L2_MODE_DISABLED:
	case MSM_SPM_MODE_RETENTION:
	case MSM_SPM_MODE_DISABLED:
		break;
	default:
		lpm = MSM_SPM_L2_MODE_DISABLED;
		lpm = MSM_SPM_MODE_DISABLED;
		break;
	}

@@ -244,7 +241,7 @@ static void lpm_system_level_update(void)

	if ((cpumask_weight(&num_powered_cores) == 1)
			|| (sys_state.allow_synched_levels))
		allowed_l2_mode = MSM_SPM_L2_MODE_POWER_COLLAPSE;
		allowed_l2_mode = MSM_SPM_MODE_POWER_COLLAPSE;
	else
		allowed_l2_mode = default_l2_mode;

@@ -606,11 +603,10 @@ static int lpm_get_l2_cache_value(const char *l2_str)
{
	int i;
	struct lpm_lookup_table l2_mode_lookup[] = {
		{MSM_SPM_L2_MODE_POWER_COLLAPSE, "l2_cache_pc"},
		{MSM_SPM_L2_MODE_PC_NO_RPM, "l2_cache_pc_no_rpm"},
		{MSM_SPM_L2_MODE_GDHS, "l2_cache_gdhs"},
		{MSM_SPM_L2_MODE_RETENTION, "l2_cache_retention"},
		{MSM_SPM_L2_MODE_DISABLED, "l2_cache_active"}
		{MSM_SPM_MODE_POWER_COLLAPSE, "l2_cache_pc"},
		{MSM_SPM_MODE_GDHS, "l2_cache_gdhs"},
		{MSM_SPM_MODE_RETENTION, "l2_cache_retention"},
		{MSM_SPM_MODE_DISABLED, "l2_cache_active"}
	};

	for (i = 0; i < ARRAY_SIZE(l2_mode_lookup); i++)
@@ -1120,7 +1116,7 @@ static int lpm_probe(struct platform_device *pdev)
		msm_pm_set_l2_flush_flag(MSM_SCM_L2_ON);
	} else {
		msm_pm_set_l2_flush_flag(MSM_SCM_L2_OFF);
		default_l2_mode = MSM_SPM_L2_MODE_POWER_COLLAPSE;
		default_l2_mode = MSM_SPM_MODE_POWER_COLLAPSE;
	}

	get_cpu();
+1 −1
Original line number Diff line number Diff line
@@ -166,7 +166,7 @@ static enum msm_pm_time_stats_id msm_pm_retention(bool from_idle)

	clk_disable(cpu_clk);

	ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_POWER_RETENTION, false);
	ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_RETENTION, false);
	WARN_ON(ret);

	msm_arch_idle();
+19 −25
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ struct pm_l2_debugfs_private_data {
};

struct _msm_pm_l2_time_stats {
	struct msm_pm_time_stats stats[MSM_SPM_L2_MODE_LAST];
	struct msm_pm_time_stats stats[MSM_SPM_MODE_NR];
};
enum stats_type {
	MSM_PM_STATS_TYPE_CPU,
@@ -78,12 +78,11 @@ static DEFINE_PER_CPU_SHARED_ALIGNED(
static DEFINE_SPINLOCK(msm_pm_l2_stats_lock);
static struct _msm_pm_l2_time_stats msm_pm_l2_time_stats;
static struct pm_l2_debugfs_private_data l2_stats_private_data[] = {
	{NULL, MSM_SPM_L2_MODE_DISABLED},
	{NULL, MSM_SPM_L2_MODE_RETENTION},
	{NULL, MSM_SPM_L2_MODE_GDHS},
	{NULL, MSM_SPM_L2_MODE_PC_NO_RPM},
	{NULL, MSM_SPM_L2_MODE_POWER_COLLAPSE},
	{NULL, MSM_SPM_L2_MODE_LAST},
	{NULL, MSM_SPM_MODE_DISABLED},
	{NULL, MSM_SPM_MODE_RETENTION},
	{NULL, MSM_SPM_MODE_GDHS},
	{NULL, MSM_SPM_MODE_POWER_COLLAPSE},
	{NULL, MSM_SPM_MODE_NR},
};

/*
@@ -147,7 +146,7 @@ void msm_pm_l2_add_stat(uint32_t id, int64_t t)
	unsigned long flags;
	struct msm_pm_time_stats *stats;

	if (id == MSM_SPM_L2_MODE_DISABLED || id >= MSM_SPM_L2_MODE_LAST)
	if (id == MSM_SPM_MODE_DISABLED || id >= MSM_SPM_MODE_NR)
		return;

	spin_lock_irqsave(&msm_pm_l2_stats_lock, flags);
@@ -425,11 +424,10 @@ static int msm_pm_l2_stat_file_show(struct seq_file *m, void *v)
	private_data = m->private;
	stats = msm_pm_l2_time_stats.stats;

	if (private_data->stats_id == MSM_SPM_L2_MODE_LAST) {
	if (private_data->stats_id == MSM_SPM_MODE_NR) {
		/* All stats print */
		for (id = 1; id < MSM_SPM_L2_MODE_LAST; id++) {
		for (id = 1; id < MSM_SPM_MODE_NR; id++)
			stats_show(m, &stats[id], 0, MSM_PM_STATS_TYPE_L2);
		}
	} else {
		/* individual status print */
		id = private_data->stats_id;
@@ -461,25 +459,21 @@ static bool msm_pm_debugfs_create_l2(void)
	if (!msm_pm_l2_root)
		return false;

	stats[MSM_SPM_L2_MODE_GDHS].name = "GDHS";
	stats[MSM_SPM_L2_MODE_GDHS].first_bucket_time =
		CONFIG_MSM_IDLE_STATS_FIRST_BUCKET;

	stats[MSM_SPM_L2_MODE_RETENTION].name = "Retention";
	stats[MSM_SPM_L2_MODE_RETENTION].first_bucket_time =
	stats[MSM_SPM_MODE_GDHS].name = "GDHS";
	stats[MSM_SPM_MODE_GDHS].first_bucket_time =
		CONFIG_MSM_IDLE_STATS_FIRST_BUCKET;

	stats[MSM_SPM_L2_MODE_PC_NO_RPM].name = "No RPM";
	stats[MSM_SPM_L2_MODE_PC_NO_RPM].first_bucket_time =
	stats[MSM_SPM_MODE_RETENTION].name = "Retention";
	stats[MSM_SPM_MODE_RETENTION].first_bucket_time =
		CONFIG_MSM_IDLE_STATS_FIRST_BUCKET;

	stats[MSM_SPM_L2_MODE_POWER_COLLAPSE].name = "PC";
	stats[MSM_SPM_L2_MODE_POWER_COLLAPSE].first_bucket_time =
	stats[MSM_SPM_MODE_POWER_COLLAPSE].name = "PC";
	stats[MSM_SPM_MODE_POWER_COLLAPSE].first_bucket_time =
		CONFIG_MSM_SUSPEND_STATS_FIRST_BUCKET;

	for (stat_id = 1;
		stat_id < MSM_SPM_L2_MODE_LAST;
		stat_id++) {
	for (stat_id = 1; stat_id < MSM_SPM_MODE_NR; stat_id++) {
		if (!stats[stat_id].name)
			continue;
		if (!debugfs_create_file(
			stats[stat_id].name,
			S_IRUGO, msm_pm_l2_root,
@@ -488,7 +482,7 @@ static bool msm_pm_debugfs_create_l2(void)
			goto l2_err;
		}
	}
	stat_id = MSM_SPM_L2_MODE_LAST;
	stat_id = MSM_SPM_MODE_NR;
	if (!debugfs_create_file("stats",
		S_IRUGO, msm_pm_l2_root,
		(void *)&l2_stats_private_data[stat_id],
+15 −30
Original line number Diff line number Diff line
@@ -157,15 +157,20 @@ unsigned int msm_spm_get_vdd(unsigned int cpu)
EXPORT_SYMBOL(msm_spm_get_vdd);

static int msm_spm_dev_set_low_power_mode(struct msm_spm_device *dev,
		unsigned int mode, bool notify_rpm, bool pc_mode)
		unsigned int mode, bool notify_rpm)
{
	uint32_t i;
	uint32_t start_addr = 0;
	int ret = -EINVAL;
	bool pc_mode = false;

	if (!dev->initialized)
		return -ENXIO;

	if ((mode == MSM_SPM_MODE_POWER_COLLAPSE)
			|| (mode == MSM_SPM_MODE_GDHS))
		pc_mode = true;

	if (mode == MSM_SPM_MODE_DISABLED) {
		ret = msm_spm_drv_set_spm_enable(&dev->reg_data, false);
	} else if (!msm_spm_drv_set_spm_enable(&dev->reg_data, true)) {
@@ -283,8 +288,7 @@ EXPORT_SYMBOL(msm_spm_reinit);
int msm_spm_set_low_power_mode(unsigned int mode, bool notify_rpm)
{
	struct msm_spm_device *dev = &__get_cpu_var(msm_cpu_spm_device);
	bool pc_mode = (mode == MSM_SPM_MODE_POWER_COLLAPSE) ? true : false;
	return msm_spm_dev_set_low_power_mode(dev, mode, notify_rpm, pc_mode);
	return msm_spm_dev_set_low_power_mode(dev, mode, notify_rpm);
}
EXPORT_SYMBOL(msm_spm_set_low_power_mode);

@@ -323,13 +327,8 @@ int __init msm_spm_init(struct msm_spm_platform_data *data, int nr_devs)
 */
int msm_spm_l2_set_low_power_mode(unsigned int mode, bool notify_rpm)
{
	bool pc_mode = true;

	if (mode == MSM_SPM_L2_MODE_DISABLED ||
		mode == MSM_SPM_L2_MODE_RETENTION)
		pc_mode = false;
	return msm_spm_dev_set_low_power_mode(
			&msm_spm_l2_device, mode, notify_rpm, pc_mode);
			&msm_spm_l2_device, mode, notify_rpm);
}
EXPORT_SYMBOL(msm_spm_l2_set_low_power_mode);

@@ -421,23 +420,14 @@ static int msm_spm_dev_probe(struct platform_device *pdev)
		uint32_t notify_rpm;
	};

	struct mode_of of_cpu_modes[] = {
	struct mode_of mode_of_data[] = {
		{"qcom,saw2-spm-cmd-wfi", MSM_SPM_MODE_CLOCK_GATING, 0},
		{"qcom,saw2-spm-cmd-ret", MSM_SPM_MODE_POWER_RETENTION, 0},
		{"qcom,saw2-spm-cmd-ret", MSM_SPM_MODE_RETENTION, 0},
		{"qcom,saw2-spm-cmd-gdhs", MSM_SPM_MODE_GDHS, 1},
		{"qcom,saw2-spm-cmd-spc", MSM_SPM_MODE_POWER_COLLAPSE, 0},
		{"qcom,saw2-spm-cmd-pc", MSM_SPM_MODE_POWER_COLLAPSE, 1},
	};

	struct mode_of of_l2_modes[] = {
		{"qcom,saw2-spm-cmd-ret", MSM_SPM_L2_MODE_RETENTION, 1},
		{"qcom,saw2-spm-cmd-gdhs", MSM_SPM_L2_MODE_GDHS, 1},
		{"qcom,saw2-spm-cmd-pc-no-rpm", MSM_SPM_L2_MODE_PC_NO_RPM, 1},
		{"qcom,saw2-spm-cmd-pc", MSM_SPM_L2_MODE_POWER_COLLAPSE, 1},
	};

	struct mode_of *mode_of_data;
	int num_modes;

	memset(&spm_data, 0, sizeof(struct msm_spm_platform_data));
	memset(&modes, 0,
		(MSM_SPM_MODE_NR - 2) * sizeof(struct msm_spm_seq_entry));
@@ -452,16 +442,11 @@ static int msm_spm_dev_probe(struct platform_device *pdev)
	 * Device with id 0..NR_CPUS are SPM for apps cores
	 * Device with id 0xFFFF is for L2 SPM.
	 */
	if (cpu >= 0 && cpu < num_possible_cpus()) {
		mode_of_data = of_cpu_modes;
		num_modes = ARRAY_SIZE(of_cpu_modes);
	if (cpu >= 0 && cpu < num_possible_cpus())
		dev = &per_cpu(msm_cpu_spm_device, cpu);

	} else if (cpu == 0xffff) {
		mode_of_data = of_l2_modes;
		num_modes = ARRAY_SIZE(of_l2_modes);
	else if (cpu == 0xffff)
		dev = &msm_spm_l2_device;
	} else
	else
		return ret;

	key = "qcom,saw2-ver-reg";
@@ -511,7 +496,7 @@ static int msm_spm_dev_probe(struct platform_device *pdev)
		spm_data.reg_init_values[spm_of_data[i].id] = val;
	}

	for (i = 0; i < num_modes; i++) {
	for (i = 0; i < ARRAY_SIZE(mode_of_data); i++) {
		key = mode_of_data[i].key;
		modes[mode_count].cmd =
			(uint8_t *)of_get_property(node, key, &len);
+2 −10
Original line number Diff line number Diff line
@@ -15,20 +15,12 @@
enum {
	MSM_SPM_MODE_DISABLED,
	MSM_SPM_MODE_CLOCK_GATING,
	MSM_SPM_MODE_POWER_RETENTION,
	MSM_SPM_MODE_RETENTION,
	MSM_SPM_MODE_GDHS,
	MSM_SPM_MODE_POWER_COLLAPSE,
	MSM_SPM_MODE_NR
};

enum {
	MSM_SPM_L2_MODE_DISABLED = MSM_SPM_MODE_DISABLED,
	MSM_SPM_L2_MODE_RETENTION,
	MSM_SPM_L2_MODE_GDHS,
	MSM_SPM_L2_MODE_PC_NO_RPM,
	MSM_SPM_L2_MODE_POWER_COLLAPSE,
	MSM_SPM_L2_MODE_LAST,
};

enum {
	MSM_SPM_REG_SAW2_CFG,
	MSM_SPM_REG_SAW2_AVS_CTL,