Loading drivers/net/wireless/wcnss/wcnss_wlan.c +21 −2 Original line number Diff line number Diff line Loading @@ -100,6 +100,14 @@ static DEFINE_SPINLOCK(reg_spinlock); #define PRONTO_PMU_COM_CPU_CBCR_OFFSET 0x0030 #define PRONTO_PMU_COM_AHB_CBCR_OFFSET 0x0034 #define PRONTO_PMU_WLAN_AHB_CBCR_OFFSET 0x0074 #define PRONTO_PMU_WLAN_AHB_CBCR_CLK_EN BIT(0) #define PRONTO_PMU_WLAN_AHB_CBCR_CLK_OFF BIT(31) #define PRONTO_PMU_CPU_AHB_CMD_RCGR_OFFSET 0x0120 #define PRONTO_PMU_CPU_AHB_CMD_RCGR_ROOT_EN BIT(1) #define PRONTO_PMU_CFG_OFFSET 0x1004 #define PRONTO_PMU_COM_CSR_OFFSET 0x1040 #define PRONTO_PMU_SOFT_RESET_OFFSET 0x104C Loading Loading @@ -466,7 +474,7 @@ EXPORT_SYMBOL(wcnss_riva_log_debug_regs); void wcnss_pronto_log_debug_regs(void) { void __iomem *reg_addr, *tst_addr, *tst_ctrl_addr; u32 reg = 0, reg2 = 0; u32 reg = 0, reg2 = 0, reg3 = 0, reg4 = 0; reg_addr = penv->msm_wcnss_base + PRONTO_PMU_SPARE_OFFSET; Loading Loading @@ -622,8 +630,19 @@ void wcnss_pronto_log_debug_regs(void) reg_addr = penv->msm_wcnss_base + PRONTO_PMU_WLAN_GDSCR_OFFSET; reg2 = readl_relaxed(reg_addr); reg_addr = penv->msm_wcnss_base + PRONTO_PMU_WLAN_AHB_CBCR_OFFSET; reg3 = readl_relaxed(reg_addr); pr_info_ratelimited("%s: PMU_WLAN_AHB_CBCR %08x\n", __func__, reg3); reg_addr = penv->msm_wcnss_base + PRONTO_PMU_CPU_AHB_CMD_RCGR_OFFSET; reg4 = readl_relaxed(reg_addr); pr_info_ratelimited("%s: PMU_CPU_CMD_RCGR %08x\n", __func__, reg4); if ((reg & PRONTO_PMU_WLAN_BCR_BLK_ARES) || (reg2 & PRONTO_PMU_WLAN_GDSCR_SW_COLLAPSE)) { (reg2 & PRONTO_PMU_WLAN_GDSCR_SW_COLLAPSE) || (!(reg4 & PRONTO_PMU_CPU_AHB_CMD_RCGR_ROOT_EN)) || (reg3 & PRONTO_PMU_WLAN_AHB_CBCR_CLK_OFF) || (!(reg3 & PRONTO_PMU_WLAN_AHB_CBCR_CLK_EN))) { pr_info_ratelimited("%s: Cannot log, wlan domain is power collapsed\n", __func__); return; Loading Loading
drivers/net/wireless/wcnss/wcnss_wlan.c +21 −2 Original line number Diff line number Diff line Loading @@ -100,6 +100,14 @@ static DEFINE_SPINLOCK(reg_spinlock); #define PRONTO_PMU_COM_CPU_CBCR_OFFSET 0x0030 #define PRONTO_PMU_COM_AHB_CBCR_OFFSET 0x0034 #define PRONTO_PMU_WLAN_AHB_CBCR_OFFSET 0x0074 #define PRONTO_PMU_WLAN_AHB_CBCR_CLK_EN BIT(0) #define PRONTO_PMU_WLAN_AHB_CBCR_CLK_OFF BIT(31) #define PRONTO_PMU_CPU_AHB_CMD_RCGR_OFFSET 0x0120 #define PRONTO_PMU_CPU_AHB_CMD_RCGR_ROOT_EN BIT(1) #define PRONTO_PMU_CFG_OFFSET 0x1004 #define PRONTO_PMU_COM_CSR_OFFSET 0x1040 #define PRONTO_PMU_SOFT_RESET_OFFSET 0x104C Loading Loading @@ -466,7 +474,7 @@ EXPORT_SYMBOL(wcnss_riva_log_debug_regs); void wcnss_pronto_log_debug_regs(void) { void __iomem *reg_addr, *tst_addr, *tst_ctrl_addr; u32 reg = 0, reg2 = 0; u32 reg = 0, reg2 = 0, reg3 = 0, reg4 = 0; reg_addr = penv->msm_wcnss_base + PRONTO_PMU_SPARE_OFFSET; Loading Loading @@ -622,8 +630,19 @@ void wcnss_pronto_log_debug_regs(void) reg_addr = penv->msm_wcnss_base + PRONTO_PMU_WLAN_GDSCR_OFFSET; reg2 = readl_relaxed(reg_addr); reg_addr = penv->msm_wcnss_base + PRONTO_PMU_WLAN_AHB_CBCR_OFFSET; reg3 = readl_relaxed(reg_addr); pr_info_ratelimited("%s: PMU_WLAN_AHB_CBCR %08x\n", __func__, reg3); reg_addr = penv->msm_wcnss_base + PRONTO_PMU_CPU_AHB_CMD_RCGR_OFFSET; reg4 = readl_relaxed(reg_addr); pr_info_ratelimited("%s: PMU_CPU_CMD_RCGR %08x\n", __func__, reg4); if ((reg & PRONTO_PMU_WLAN_BCR_BLK_ARES) || (reg2 & PRONTO_PMU_WLAN_GDSCR_SW_COLLAPSE)) { (reg2 & PRONTO_PMU_WLAN_GDSCR_SW_COLLAPSE) || (!(reg4 & PRONTO_PMU_CPU_AHB_CMD_RCGR_ROOT_EN)) || (reg3 & PRONTO_PMU_WLAN_AHB_CBCR_CLK_OFF) || (!(reg3 & PRONTO_PMU_WLAN_AHB_CBCR_CLK_EN))) { pr_info_ratelimited("%s: Cannot log, wlan domain is power collapsed\n", __func__); return; Loading